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參數(shù)資料
| 型號(hào)： | RT9241B |
| 文件頁數(shù)： | 13/18頁 |
| 文件大小： | 333K |
| 代理商： | RT9241B |
RT9241A/B
DS9241AB-01 October 2002
www.richtek.com
13
LC
2
π
kHz
8
CR
π
2
1
ESR
=
1
2
C
R
2
, ,
π
)
C
C
C
C
(
R
2
1
2
1
2
1
2
+
×
π
Design Example for RT9241A
Two phase converter V
CORE
= 1.5V, V
IN
= 12V, full load
current = 40Amp, droop voltage at full load = 120mV,
OCP trip point for each power stage = 30Amp (at
Sample/Hold), low side MOSFET R
DS(ON)
= 6m
at
room temperature, L = 2
μ
H, C
OUT
= 9000
μ
F,
capacitor ESR = 2m
.
1. Compensation setting
a. Modulator Gain, Pole and Zero
Modulator Gain =
saw-tooth wave amplitude V
RAMP
= 1.7V,
modulator Gain = 8.6 = 18.7dB
LC filter pole = ,
ESR zero =
b. EA compensation network
Use type 2 compensation scheme (see Fig. 5),
mid-band gain = . Choose R
1
= 2.4K
,
R
2
= 24K
, C
1
= 6.6nF, C
2
= 33pF, get F
Z
= 1KHz,
Fp = 200KHz, mid-band Gain=10=20dB,
modulator asymptotic Bode plot of EA
compensation and PWM loop Gain Bode shown
as Fig. 6.
Fig. 5 EA Compensation Network
Fig. 6 Asymptotic Bode Plot of PWM Loop Gain
2. Over Current Protection setting
OCP trip point current = 30A (at Sample/Hold)
，
R
I
SP
, R
ISP
= 2.4K
Take the temperature rising for consideration, if
MOSFET working temperature=70
°
C and the
temperature coefficient =5000ppm/
°
C, R
ISP
(70
°
C)
= R
ISP
(27
°
C)
×
{R
DS(ON)
(70
°
C)/R
DS(ON)
(27
°
C)} =
1.75K
3. Droop setting
Full load current of each power channel = 40A/2 =
20Amp, the ripple current =
I
L
=
V
5
1
H
2
μ
, load current at S/H
= , GM Amp
)
MAX
(
X
I
S/H ,
R
ISP
= R
ISN
= 2.4K
, I
X(MAX)
= 46
μ
A, required Droop
= 120mV = 46
μ
A
×
2
×
2/3
×
R
ADJ
，
R
ADJ
= 1.97K
.
Take the temperature rising for consideration, we
just modify R
ISP
like OCP setting.
4. SS capacitor
C
SS
= 0.1
μ
F is the suitable value for most
application.
V
R
Asymptotic Bode Plot of PWM Loop Gain
100
-60
-40
-20
0
20
40
60
80
10 100 1K 10K 100K 1M 10M
Frequency (Hz)
G
Uncompensated EA Gain
Compensated EA Gain
Modulator Gain
PWM Loop Gain
A
28
.
V
12
V
5
S
5
=
×
×
μ
A
36
.
18
2
I
A
20
L
=
R
+
_
EA
C
1
C
3
C
2
R
2
R
3
R
1
FB
DACOUT
V
CORE
COMP
R
3
, C
3
are used in type 3
compensation scheme (left
NC in type 2)
R
OL
R
OL
for no load offset
setting
R
)
ON
(
DS
X
×
=
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