
Raytheon RF Components
362 Lowell Street
Andover, MA 01810
Revised March 14 2001
Page 2
www.raytheon.com/micro
Characteristic performance data and specifications are subject to change without notice.
PRODUCT INFORMATION
Figure 1
Functional Block
Diagram
Drain
Supply
Vd1
Drain
Supply
Vd2
Drain
Supply
Vd3
Drain
Supply
Vd4
MMIC Chip
RF OUT
RF IN
Gate Supply
Vg1
Ground
(Back of Chip)
Gate Supply
Vg2
CAUTION: THIS IS AN ESD SENSITIVE DEVICE.
Chip carrier material should be selected to have GaAs compatible thermal coefficient of expansion and high thermal
conductivity such as copper molybdenum or copper tungsten. The chip carrier should be machined, finished flat,
plated with gold over nickel and should be capable of withstanding 325°C for 15 minutes.
Die attachment should utilize Gold/Tin (80/20) eutectic alloy solder and should avoid hydrogen environment for
PHEMT devices. Note that the backside of the chip is gold plated and is used as RF and DC ground.
These GaAs devices should be handled with care and stored in dry nitrogen environment to prevent contamination
of bonding surfaces. These are ESD sensitive devices and should be handled with appropriate precaution including
the use of wrist grounding straps. All die attach and wire/ribbon bond equipment must be well grounded to prevent
static discharges through the device.
Recommended wire bonding uses 3 mils wide and 0.5 mil thick gold ribbon with lengths as short as practical
allowing for appropriate stress relief. The RF input and output bonds should be typically 0.012” long corresponding
to a typically 2 mil between the chip and the substrate material.
Application
Information
Figure 2
Chip Layout and Bond
Pad Locations
Chip Size is 2.9 mm x
1.25 mm x 100
μ
m.
Back of chip is RF and
DC ground
0.6255
0.476
0.0
0.0
0.0
0.0
1.25
1.25
2.9
2.9
0.293
1.476
1.7375
2.013
0.645
0.895
1.895
2.645
0.774
0.6245
0.475
0.775
Dimensions in mm
RMWL38001
37-40 GHz Low Noise Amplifier MMIC