參數(shù)資料
型號(hào): RM3182A
廠商: Fairchild Semiconductor Corporation
英文描述: ARINC 429 Differential Line Driver(ARINC 429標(biāo)準(zhǔn)差分線驅(qū)動(dòng)器)
中文描述: ARINC公司429差分線路驅(qū)動(dòng)器(個(gè)ARINC 429標(biāo)準(zhǔn)差分線驅(qū)動(dòng)器)
文件頁(yè)數(shù): 1/12頁(yè)
文件大?。?/td> 66K
代理商: RM3182A
www.fairchildsemi.com
Features
Adjustable rise and fall times
Low supply current
Capable of driving 30 nF || 400
Digitally selectable 12.5 or 100 kbit/sec data rate
Adjustable output voltages swing
Output overvoltage protected
Short circuit protected
TTL and CMOS compatible inputs
MIL-STD-883B screening available
Available in 16-lead ceramic sidebrazed DIP and
28-Terminal LCC
W
Description
The RM3182A is a complete differential line driver IC.
When Data A = Data B or Sync or Clock Signal is low, the
driver forces the output to a Voltage Null level
(0V
±
250 mV). Designed to address the ARINC 429 stan-
dard, the RM3182A has output rise and fall times that can be
adjusted by the selection of an external capacitor (C
and an output voltage range adjustable through an externally
applied V
REF
signal. All logic inputs and sync control inputs
are TTL/CMOS compatible. The device is constructed on a
monolithic IC using a junction-isolated bipolar process.
Sputtered SiCr resistors in the internal bias circuitry provide
for stable bias currents and a tighter tolerance of output
impedance. The RM3182A is available in 16-lead ceramic
sidebrazed DIP, 28-Terminal LCC and can be ordered with
MIL-STD-883B high reliability screening.
A
or C
B
)
Block Diagram
65-5890A
Data (A)
Clock
Sync
V
REF
Data B
Charge Pumps
Data (A)
Clock
Sync
V
REF
Data (B)
I
SET
(B)
I
SET
(A)
V
LOGIC
Rate
Select
Cap
(A)
Cap
(B)
I
SET
(B)
I
SET
(A)
Rate
Select
Cap B
GND
V
EE
10K
10K
10K
10K
3 pF
V
EE
V
CC
V
EE
37.5
W
10K
10K
10K
3 pF
V
CC
V
CC
Cap (A)
Amp A
Out A
R
L
C
L
Out B
Amp B
37.5
W
V
LOGIC
10K
Note: Pin numbers are for the DIP package.
4
14
3
1
5
13
16
2
12
8
7
15
11
6
10
9
V
LOGIC
RM3182A
ARINC 429 Differential Line Driver
Rev. 1.0.0
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