參數(shù)資料
型號: RDC-19220-202S
廠商: DATA DEVICE CORP
元件分類: 位置變換器
英文描述: SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, PDIP40
封裝: 2 X 0.600 INCH, 0.200 INCH HEIGHT, PLASTIC, DDIP-40
文件頁數(shù): 4/24頁
文件大?。?/td> 256K
代理商: RDC-19220-202S
12
Data Device Corporation
www.ddc-web.com
RDC-19220 SERIES
L-11/02-300
8
10
-VCO
VEL
+5 V
-5 V
100 k
(OFFSET)
100 RV
0.8 RV
0.4 R (SCALING)
V
RDC-19220
R
+ REF
C
LAG
- REF
+ REF
- REF
R
+ REF
C
LEAD
- REF
+ REF
- REF
FIGURE 10. VELOCITY TRIMMING
FIGURE 11. PHASE-SHIFT COMPENSATION
Xc
tan
=
R
Where
= desired phase-shift
1
Xc =
2
πfc
Where
f = carrier frequency
Where
c = capacitance
REDUCED POWER SUPPLY CURRENTS
When Rs = 30 k
(tracking rate is not being pushed), nominal power
supply current can be cut from 14 to 9 mA by setting Rc = 53 k
.
TRANSFORMER ISOLATION
System requirements often include electrical isolation. There are
transformers available for reference and synchro/resolver signal
isolation. TABLE 6 includes a listing of the most common trans-
formers. The synchro/resolver transformers reduce the voltage to
2 Vrms for a direct connection to the converter. See FIGURES
5A, 5B, 5C and 5D for transformer layouts and schematics, and
FIGURE 6 for typical connections.
DC INPUTS
As noted in TABLE 1 the RDC-19220 will accept dc inputs. It is
necessary to set the REF input to dc by tying +REF to +5 V and
-REF to GND or -5 \/. (With dc inputs, the converter will function
from 0 to 180° and BIT will remain at logic 0.)
VELOCITY TRIMMING
RDC-19220 Series specifications for velocity scaling, reversal
error and offset are contained in TABLE 1. Velocity scaling and
offset are externally trimmable for applications requiring tighter
specifications than those available from the standard unit. FIG-
URE 10 shows the setup for trimming these parameters with
external pots. It should also be noted that when the resolution is
changed, VEL scaling is also changed. Since the VEL output is
from an integrator with capacitor feedback, the VEL voltage can-
not change instantaneously. Therefore, when changing resolu-
tion while moving there will be a transient with a magnitude pro-
portional to the velocity and a duration determined by the con-
verter bandwidth.
INCREASED TRACKING/DECREASED SETTLING
(GEAR SHIFTING)
Connecting the BIT output to the resolution control lines (A and
B) will change the resolution of the converter down (“gear shift”)
and make the converter settle faster and track at higher rates.
The converter bandwidth is independent of the resolution.
ADDITIONAL ERROR SOURCES
Quadrature voltages in a resolver or synchro are by definition the
resulting 90° fundamental signal in the nulled out error voltage (e)
in the converter. This voltage is due to capacitive or inductive cou-
pling in the synchro or resolver signals. A digital position error will
result due to the interaction of this quadrature voltage and a refer-
ence phase shift between the converter signal and reference
inputs. The magnitude of this error is given in the following formula:
Magnitude of Error = (Quadrature Voltage/F.S.signal) tan
α
Where:
Magnitude of Error is in radians
Quadrature Voltage is in volts
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