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參數(shù)資料
| 型號： | R5F64342JFD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 60 MHz, MICROCONTROLLER, PQFP144 |
| 封裝： | 20 X 20 MM, 0.50 MM PITCH, PLASTIC, LQFP-144 |
| 文件頁數(shù)： | 23/110頁 |
| 文件大?。?/td> | 982K |
| 代理商： | R5F64342JFD |
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REJ03B0244-0030 Rev.0.30 Feb 14, 2008
Page 2 of 108
Under development
Preliminary Specification
Specifications in this preliminary version are subject to change.
R32C/134 Group
1. Overview
1.1.2
Performance Overview
Table 1.1
R32C/134 Group Performance (1/2)
Unit
Function
Performance
CPU
Central process-
ing unit
R32C/100 Series CPU Core
Basic instructions: 108 instructions
Minimum instruction execution time: 16.67 ns (f(CPU) = 60 MHz)
Multiplier: 32-bit × 32-bit
64-bit
Multiply-accumulate unit: 32-bit × 32-bit + 64-bit
64-bit
IEEE-754 floating point standard: Single precision
32-bit barrel shifter
Operating mode: Single-chip mode
Memory
Flash memory: 256/384/512 Kbytes
RAM: 20/24/32 Kbytes
Data flash: 4 Kbytes × 2 blocks
E2dataFlash: 4 Kbytes
Refer to Table 1.3 for details
Clock
Clock generator
4 circuits (Main clock, sub clock, PLL, on-chip oscillator)
Oscillation stop detector: Main clock oscillator stop/re-oscillation
detection
Frequency divide circuit: Divide-by-2 to divide-by-24 selectable
Low power modes: Wait mode, stop mode
Interrupts
Total interrupt vectors: 261
External interrupt inputs:
NMI, INT × 9, key input × 4
Interrupt priority levels: 7 levels
Watchdog Timer
15 bits × 1 (selectable input frequency from prescaler output)
Automatic timer start function is available
DMA
DMAC
4 channels
Cycle-steal transfer mode
Request sources: 51
2 transfer modes: Single transfer, repeat transfer
DMAC II
Can be activated by any peripheral interrupt source
3 transfer functions: Immediate data transfer, calculation transfer,
chained transfer
I/O Ports
Programmable I/
O ports
2 input-only ports
120 CMOS inputs/outputs
A pull-up resistor is selectable for every 4 input ports
Timer
Timer A
16-bit timer × 5
Timer mode, event counter mode, one-shot timer mode, pulse-width
modulation (PWM) mode
Two-phase pulse signal processing in event counter mode (two-
phase encoder input) × 3
Timer B
16-bit timer × 6
Timer mode, event counter mode, pulse frequency measurement
mode, pulse-width measurement mode
Three-phase
motor control
timer
Three-phase motor control timer ×1 (timers A1, A2, A4, and B2 used)
8-bit programmable dead time timer
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