參數(shù)資料
型號(hào)： R5F6420ELFB
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 64 MHz, MICROCONTROLLER, PQFP100
封裝： 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100
文件頁數(shù)： 10/98頁
文件大?。?/td> 677K
代理商： R5F6420ELFB
REJ03B0236-0050 Rev.0.50 Jul 31, 2008
Page 18 of 96
Under development
Preliminary Specification
This is a preliminary specification and is subject to change.
R32C/120 Group
3. Memory
3.
Memory
Figure 3.1 shows a memory mapping of the R32C/120 Group.
The R32C/120 Group provides 4-Gbyte address space from 00000000h to FFFFFFFFh.
The internal ROM is allocated from address FFFFFFFFh down. For example, a 256-Kbyte internal ROM is
addressed from FFFC0000h to FFFFFFFFh.
The fixed interrupt vectors are allocated from address FFFFFFDCh to FFFFFFFFh in which the starting
address of each interrupt handler is stored.
The internal RAM is allocated from address 00000400h up. For example, a 20-Kbyte internal RAM is
addressed from 00000400h to 000053FFh. Besides being used for data storage, the internal RAM functions
as stack(s) for a subroutine and/or an interrupt handler.
Special Function Registers (SFRs), consisting of control registers for peripheral functions, are allocated
from address 00000000h to 000003FFh and from 00040000h to 0004FFFFh. Any blank spaces within the
SFRs are reserved. No access is allowed.
Figure 3.1
Memory Mapping
Internal RAM
SFR1
SFR2
Internal ROM
00000000h
FFFFFFFFh
Reset
NMI
Reserved
Watchdog timer (2)
Reserved
BRK instruction
Overflow
Undefined instruction
FFFFFFFFh
FFFFFFDCh
Notes:
1. Additional two 4-Kbyte spaces (blocks A and B) for storing data are provided in the flash memory version.
2. The watchdog timer interrupt shares the vector table with the oscillation stop detection interrupt and low-
voltage detection interrupt.
YYYYYYYYh
00000400h
XXXXXXXXh
Reserved
00040000h
Internal ROM
(Data space) (1)
00060000h
00062000h
Reserved
00050000h
Reserved
Internal RAM
Capacity
XXXXXXXXh
12 Kbytes
00003400h
Internal ROM
Capacity
YYYYYYYYh
128 Kbytes FFFE0000h
256 Kbytes FFFC0000h
20 Kbytes
00005400h
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