參數(shù)資料
型號: R5F64185PFD
元件分類: 微控制器/微處理器
英文描述: 64-BIT, FLASH, MICROCONTROLLER, PQFP144
封裝: 20 X 20 MM, 0.50 MM PITCH, PLASTIC, LQFP-144
文件頁數(shù): 3/126頁
文件大?。?/td> 899K
代理商: R5F64185PFD
REJ03B0255-0110
Rev.1.10
Page 100 of 123
Jun 23, 2010
R32C/118 Group
5. Electrical Characteristics
VCC =5V
Timing Requirements (VCC = 4.2 to 5.5 V, VSS = 0 V, and Ta =Topr, unless otherwise noted)
Table 5.30
Serial Interface
Symbol
Characteristic
Value
Unit
Min.
Max.
tc(CK)
CLKi input clock period
200
ns
tw(CKH)
CLKi input high level pulse width
80
ns
tw(CKL)
CLKi input low level pulse width
80
ns
tsu(D-C)
RXDi input setup time
80
ns
th(C-D)
RXDi input hold time
90
ns
Table 5.31
A/D Trigger Input
Symbol
Characteristic
Value
Unit
Min.
Max.
tw(ADH)
ADTRG input high level pulse width
Hardware trigger input high level pulse width
ns
tw(ADL)
ADTRG input low level pulse width
Hardware trigger input high level pulse width
125
ns
Table 5.32
External Interrupt INTi Input
Symbol
Characteristic
Value
Unit
Min.
Max.
tw(INH)
INTi input high level pulse width
Edge sensitive
250
ns
Level sensitive
tc(CPU) + 200
ns
tw(INL)
INTi input low level pulse width
Edge sensitive
250
ns
Level sensitive
tc(CPU) + 200
ns
Table 5.33
Intelligent I/O
Symbol
Characteristic
Value
Unit
Min.
Max.
tc(ISCLK2)
ISCLK2 input clock period
600
ns
tw(ISCLK2H)
ISCLK2 input high level pulse width
270
ns
tw(ISCLK2L)
ISCLK2 input low level pulse width
270
ns
tsu(RXD-ISCLK2) ISRXD2 input setup time
150
ns
th(ISCLK2-RXD)
ISRXD2 input hold time
100
ns
3
φ
AD
----------
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