參數(shù)資料
型號(hào)： R5F64115DFB
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 50 MHz, MICROCONTROLLER, PQFP100
封裝： 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100
文件頁數(shù)： 36/84頁
文件大?。?/td> 1206K
代理商： R5F64115DFB
REJ03B0227-0110 Rev.1.10 Sep 17, 2009
Page 33 of 99
R32C/111 Group
2. Central Processing Unit (CPU)
2.1.8.5
Register Bank Select Flag (B flag)
This flag selects a register bank. It indicates 0 when the register bank 0 is selected, and 1 when the
register bank 1 is selected.
2.1.8.6
Overflow Flag (O flag)
This flag becomes 1 if an overflow occurs in an operation; otherwise it is 0.
2.1.8.7
Interrupt Enable Flag (I flag)
This flag enables maskable interrupts. To disable maskable interrupts, set this flag to 0. To enable
them, set this flag to 1. When an interrupt is accepted, the flag becomes 0.
2.1.8.8
Stack Pointer Select Flag (U flag)
To select the interrupt stack pointer (ISP), set this flag to 0. To select the user stack pointer (USP), set
this flag to 1.
It becomes 0 when a hardware interrupts is accepted or when an INT instruction designated by a
software interrupt number from 0 to 127 is executed.
2.1.8.9
Floating-point Underflow Flag (FU flag)
This flag becomes 1 when an underflow occurs in a floating-point operation; otherwise it is 0. It also
becomes 1 when the operand has invalid numbers (subnormal numbers).
2.1.8.10
Floating-point Overflow Flag (FO flag)
This flag becomes 1 when an overflow occurs in a floating-point operation; otherwise it is 0. It also
becomes 1 when the operand has invalid numbers (subnormal numbers).
2.1.8.11
Processor Interrupt Priority Level (IPL)
The processor interrupt priority level (IPL), consisting of three bits, selects a processor interrupt priority
level from level 0 to 7. An interrupt is acceptable when the interrupt request level is higher than the
selected IPL.
When the processor interrupt priority level (IPL) is set to 111b (level 7), all interrupts are disabled.
2.1.8.12
Fixed-point Radix Point Designation Bit (DP bit)
This bit designates the radix point. It also specifies which portion of the fixed-point multiplication result
to take. It is used in the MULX instruction.
2.1.8.13
Floating-point Rounding Mode (RND)
The 2-bit floating-point rounding mode selects a rounding mode for floating-point calculation results.
2.1.8.14
Reserved
Only set this bit to 0. The read value is undefined.
相關(guān)PDF資料
PDF描述
R5F64114NFB 32-BIT, FLASH, 50 MHz, MICROCONTROLLER, PQFP100
R5F64112DFB 32-BIT, FLASH, 50 MHz, MICROCONTROLLER, PQFP100
R5F64165PFD 64-BIT, FLASH, MICROCONTROLLER, PQFP144
R5F64168HNFB 64-BIT, FLASH, MICROCONTROLLER, PQFP100
R5F64168HDFB 64-BIT, FLASH, MICROCONTROLLER, PQFP100
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
R5F64115DFB#U0 功能描述:MCU 384KB ROM 40KB RAM 100-LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:M16C/R32C/100/111 產(chǎn)品培訓(xùn)模塊:CAN Basics Part-1 CAN Basics Part-2 Electromagnetic Noise Reduction Techniques Part 1 M16C Product Overview Part 1 M16C Product Overview Part 2 標(biāo)準(zhǔn)包裝:1 系列:M16C™ M32C/80/87 核心處理器:M32C/80 芯體尺寸:16/32-位 速度:32MHz 連通性:EBI/EMI，I²C，IEBus，IrDA，SIO，UART/USART 外圍設(shè)備:DMA，POR，PWM，WDT 輸入/輸出數(shù):121 程序存儲(chǔ)器容量:384KB（384K x 8） 程序存儲(chǔ)器類型:閃存 EEPROM 大小:- RAM 容量:24K x 8 電壓 - 電源 (Vcc/Vdd):3 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 34x10b，D/A 2x8b 振蕩器型:內(nèi)部 工作溫度:-20°C ~ 85°C 封裝/外殼:144-LQFP 包裝:托盤 產(chǎn)品目錄頁面:749 (CN2011-ZH PDF) 配用:R0K330879S001BE-ND - KIT DEV RSK M32C/87
R5F64115NFB 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:RENESAS MCU
R5F64116DFB 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:RENESAS MCU
R5F64116DFB#U0 制造商:Renesas Electronics Corporation 功能描述:MCU 16-Bit R8C CISC 512KB Flash 3.3V/5V 100-Pin LQFP Tray 制造商:Renesas Electronics Corporation 功能描述:MCU 3/5V 512K I-TEMP PB-FREE 100-LQFP - Trays 制造商:Renesas Electronics Corporation 功能描述:MCU 16BIT 512KB FLASH 100LFQFP
R5F64116NFB 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:RENESAS MCU
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