參數(shù)資料
型號: R5F5630EDDFC#V0
廠商: Renesas Electronics America
文件頁數(shù): 20/165頁
文件大小: 0K
描述: MCU RX630 2MB FLASH 176-LQFP
產(chǎn)品培訓模塊: RX Compare Match Timer
RX DMAC
標準包裝: 1
系列: RX600
核心處理器: RX
芯體尺寸: 32-位
速度: 100MHz
連通性: CAN,EBI/EMI,I²C,LIN,SCI,SPI,USB
外圍設備: DMA,LVD,POR,PWM,WDT
輸入/輸出數(shù): 148
程序存儲器容量: 2MB(2M x 8)
程序存儲器類型: 閃存
RAM 容量: 128K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b,21x12b,D/A 2x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 176-LQFP
包裝: 托盤
R01DS0060EJ0100 Rev.1.00
Page 116 of 168
Sep 13, 2011
RX630 Group
4. I/O Registers
Note 2.
When the same output trigger is specified for pulse output groups 0 and 1 by the PPG0.PCR setting, the PPG0.NDRL address is 000881EDh. When different output
triggers are specified, the PPG0.NDRL addresses for pulse output groups 0 and 1 are 000881EFh and 000881EDh, respectively.
Note 3.
When the same output trigger is specified for pulse output groups 6 and 7 by the PPG1.PCR setting, the PPG1.NDRH address is 000881FCh. When different output
triggers are specified, the PPG1.NDRH addresses for pulse output groups 6 and 7 are 000881FEh and 000881FCh, respectively.
Note 4.
When the same output trigger is specified for pulse output groups 4 and 5 by the PPG1.PCR setting, the PPG1.NDRL address is 000881FDh. When different output
triggers are specified, the PPG1.NDRL addresses for pulse output groups 4 and 5 are 000881FFh and 000881FDh, respectively.
Note 5.
Odd addresses should not be accessed in 16-bit units. When accessing a register in 16-bit units, access the address of the TMR0 or TMR2 register. Table 25.4 lists
register allocation for 16-bit access.
Note 6.
The CAN2 module is not provided in products less than 1 Mbyte of ROM.
Note 7.
The CAN0 module is not provided in products less than 512 Kbytes of ROM.
Note 8.
When the register is accessed while the USB is operating, a delay may be generated in accessing.
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R5F5630EDDFP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Renesas MCUs
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