參數(shù)資料
型號： R5F5630EDDFB#V0
廠商： Renesas Electronics America
文件頁數(shù)： 25/165頁
文件大小： 0K
描述： MCU RX630 2MB FLASH 144-LQFP
產(chǎn)品培訓(xùn)模塊： RX Compare Match Timer
RX DMAC
標(biāo)準(zhǔn)包裝： 1
系列： RX600
核心處理器： RX
芯體尺寸： 32-位
速度： 100MHz
連通性： CAN，EBI/EMI，I²C，LIN，SCI，SPI，USB
外圍設(shè)備： DMA，LVD，POR，PWM，WDT
輸入/輸出數(shù)： 117
程序存儲器容量： 2MB（2M x 8）
程序存儲器類型： 閃存
RAM 容量： 128K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x10b，21x12b，D/A 2x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 144-LQFP
包裝： 托盤
R01DS0060EJ0100 Rev.1.00
Page 120 of 168
Sep 13, 2011
RX630 Group
5. Electrical Characteristics
Note 1. Supply current values are with all output pins unloaded and all input pull-up MOSs in the off state.
Note 2. Measured with clocks supplied to the peripheral functions. This does not include the BGO operation.
Note 3. ICC depends on f (ICLK) as follows. (ICLK:PCLK:BCLK:BCLK pin = 8:4:4:2)
ICC Max. = 0.87 × f + 13 (max. operation in high-speed operating mode)
ICC Typ. = 0.35 × f + 5 (normal operation in high-speed operating mode)
ICC Typ. = 1.0 × f + 3 (low-speed operating mode 1)
ICC Max. = 0.48 × f + 12 (sleep mode)
Note 4. This does not include the BGO operation.
Note 5. This is the increase for programming or erasure of the ROM or flash memory for data storage during program execution.
Note 6. Supply of the clock signal to peripherals is stopped in this state. This does not include the BGO operation.
Note 7. The reference power supply current is included in the power supply current value for 10-bit A/D conversion and D/A conversion.
Note 8. When VBATT is used
Table 5.4
DC Characteristics (3)
Conditions: VCC = AVCC0 = VCC_USB = VBATT = 2.7 to 3.6 V, VREFH/VREFH0 = 2.7 V to AVCC0,
VSS = AVSS0 = VREFL/VREFL0 = VSS_USB = 0 V, Ta = Topr
Item
Symbol
Min.
Typ.
Max.
Unit
Test Conditions
Supply
current*1
High
-speed
oper
ating
mode
Max.*2
ICC*3
—
100
mA
ICLK = 100 MHz
PCLKB = 50 MHz
FCLK = 50 MHz
BCLK = 50 MHz
Normal
Peripheral function: clock signal
supplied*4
—52
—
Peripheral function: clock signal
—40
—
Sleep mode
—
25
60
All-module-clock-stop mode (reference
value)
—20
30
Increased by BGO operation*5
—15
—
Low-speed operating mode 1*6
—4
—
ICLK = 1 MHz
Low-speed operating mode 2
—
1
—
ICLK = 32.768
kHz
Software standby mode
—
0.2
6
Deep
sof
twar
e
st
and
by
mode
Power supplied to on-chip RAM and USB
resume detecting unit
—
22
200
A
Power not supplied
to on-chip RAM
and USB resume
detecting unit
Power-on reset circuit
and low-power
consumption function
disabled
—21
60
Power-on reset circuit
and low-power
—6.2
28
Increased by RTC operation
—
3
—
RTC operation when VCC is off
—
1.7
—
VBATT = 2.3 V
—
3.3
—
VBATT = 3.3 V
Analog power
supply
current*7
During 12-bit A/D conversion (including
temperature sensor)
AICC
—
2.3
3.2
mA
During 10-bit A/D conversion
—
1.0
1.65
mA
During D/A conversion (per unit)
—
0.7
1.0
mA
Waiting for A/D, D/A conversion (all units)
—
25
35
A
A/D, D/A converter in standby mode (all units)
—
0.1
4.0
A
Reference
power supply
current
During 12-bit A/D conversion
IREFH
—
0.6
0.7
mA
Waiting for 12-bit A/D conversion (per unit)
—
0.5
0.6
mA
12-bit A/D converter in standby mode (per unit)
—
0.1
2.0
A
VCC rising gradient
SrVCC
8.4
—
20000
s/V
VCC falling gradient*8
SfVCC
8.4
—
s/V
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