參數(shù)資料
型號(hào): R5F36CA6DFB
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 32 MHz, MICROCONTROLLER, PQFP100
封裝: 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100
文件頁(yè)數(shù): 96/99頁(yè)
文件大?。?/td> 759K
代理商: R5F36CA6DFB
A - 1
REVISION HISTORY
M16C/6C Group Datasheet
Rev.
Date
Description
Page
Summary
1.00
Jul 15, 2009
-
First Edition issued.
2.00
Feb 07, 2011
Overall
0004h Processor Mode Register 0: Combined differing reset values into one.
Overall
0019h Voltage Detector 2 Flag Register: Changed the reset value from “0000 X000b”.
Overall
001Ah Voltage Detector Operation Enable Register: Changed reset value from “000X
0000b”.
Overall
002Ah Voltage Monitor 0 Control Register: Changed reset value from “1100 XX10b”.
Overall
002Bh Voltage Monitor 1 Control Register: Changed reset value from “1000 1X10b”.
Overall
02B9h I2C0 Status Register 1: Changed reset value from “00h”.
Overall
0324h Increment/Decrement Flag: Changed name from Up/Down Flag.
Overall
03DCh D/A Control Register: Changed reset value from “XXXX XX00b”.
Overall
Changed the UVCC pin from “Input” to “I/O”.
Overview
Chap. 1.
Changed from “INPC10 to INPC17” to “INPC1_0 to INPC1_7” and from “OUTC10 to
OUTC17” to “OUTC1_0 to OUTC1_7”.
1
1.1.1 Applications: Added the note.
3
Table 1.2 Specifications (2/2):
Changed the value in the Current Consumption row to “Described in Electrical
Characteristics”.
Deleted note 1.
4
Table 1.3 Product List: Changed the development status.
5
Figure 1.2 Marking Diagram (Top View): Added the detail explanations for the 7-digit date
code.
7, 8
Figure 1.4 Pin Assignment and Figure 1.5 Pin Assignment:
Added “/TSUDA” to P8_0 and “/TSUDB” to P8_1.
9
Table 1.4 Pin Names (1/2): Added “/TSUDB” to P8_1 and “/TSUDA” to P8_0.
11
Table 1.6 Pin Functions (1/3):
Changed the description of CNVSS pin.
Changed the description of
HOLD pin.
12
Table 1.7 Pin Functions (2/3): Added “TSUDA, TSUDB” to the pin name of Timer S.
13
Table 1.8 Pin Functions (3/3): Deleted notes 1 and 2.
Address Space
18
Figure 3.2 Memory Map: Added note 1 and 3 to the reserved areas.
Special Function Registers (SFRs)
20
Table 4.1 SFR Information (1):
Deleted “the VCR1 register, the VCR2 register” from note 2.
Deleted notes 5 to 6 and added note 5.
21
Table 4.2 SFR Information (2): Deleted notes 2 to 6 and added note 2.
35
Table 4.16 SFR Information (16): Deleted “00000010b” from values after hardware reset in
note 2.
43
4.2.1 Register Settings: Added the description regarding read-modify-write instructions.
44
Table 4.26 Read-Modify-Write Instructions: Added.
Electrical Characteristics
Chap. 5.
Moved the measuring conditions in note 1 to below the table title.
Chap. 5.
Reordered figures and tables in 5.2.2 Timing Requirements (Peripheral Functions and
Others) and 5.3.2 Timing Requirements (Peripheral Functions and Others).
45
Table 5.1 Absolute Maximum Ratings:
Changed the Condition of the Vcc2 row.
Added the VREF row.
Added a row for the data area value to Topr (Flash program erase).
Added the note 1.
46
Table 5.2 Recommended Operating Conditions (1/3): Added the IOH(sum) row and deleted
note 3.
47
Table 5.3 Recommended Operating Conditions (2/3): Added the IOL(sum) row and deleted
note 3.
相關(guān)PDF資料
PDF描述
R5F36CA6NFB 16-BIT, FLASH, 32 MHz, MICROCONTROLLER, PQFP100
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