參數(shù)資料
型號: R5F36CA6DFA
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 32 MHz, MICROCONTROLLER, PQFP100
封裝: 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100
文件頁數(shù): 97/99頁
文件大?。?/td> 759K
代理商: R5F36CA6DFA
A - 2
2.00
Feb 07, 2011
49
Table 29.5 A/D Conversion Characteristics (1/2):
Added the Measuring Condition of the Resolution row.
50
Table 5.6 A/D Conversion Characteristics (2/2): Added the note 5.
52
Table 5.9 CPU Clock When Operating Flash Memory (f(BCLK)):
Added the Typ. value of the Low current consumption read mode.
52
Table 5.10 Flash Memory (Program ROM 1, 2) Electrical Characteristics:
Added a condition to the Read voltage row.
Modified note 1.
Deleted the example stated in note 4.
53
Table 5.11 Flash Memory (Data Flash) Electrical Characteristics:
Changed “128 groups” to “256 groups” in note 4.
54
Table 5.12 Voltage Detector 0 Electrical Characteristics: Added the condition in the Vdet0
row.
55
Table 5.15 Power-On Reset Circuit:
Added the Vpor1 and tw(por) row.
Deleted the Condition of trth row.
Added the last line in note 1.
55
Figure 5.5 Power-On Reset Circuit Electrical Characteristics:
Changed the signal name “0.1 V” to “Vpor1”.
Deleted note 2.
57
Table 5.17 40 MHz On-Chip Oscillator Electrical Characteristics:
Changed the Condition in the fOCO40M row.
59
Table 5.20 Electrical Characteristics (2): Added “ZP, IDU, IDV, IDW” to the VT+ - VT- row.
60
Table 5.21 Electrical Characteristics (3):
Added the During flash memory program row and During flash memory erase row.
65, 83
5.2.2.5 and 5.3.2.5 Timer S Input: Added.
67, 85
5.2.2.8 and 5.3.2.8 Multi-master I2C-bus: Added.
68
Table 5.36 Memory Expansion Mode and Microprocessor Mode:
Changed
RDY input setup time from 30.
68 to 75,
86 to 93
Table 5.36 to Table 5.39 and Table 5.56 to Table 5.59 Memory Expansion Mode and
Microprocessor Mode:
Deleted the following:
HOLD input setup time
HOLD input hold time
HLDA output delay time
69, 87
Figure 5.16 and Figure 5.29 Timing Diagram:
Deleted lower figure (Common to wait state and no wait state settings).
77
Table 5.40 Electrical Characteristics (1): Added “ZP, IDU, IDV, IDW” to the VT+ - VT- row.
78
Table 5.41 Electrical Characteristics (2):
Added the During flash memory program row and During flash memory erase row.
86
Table 5.56 Memory Expansion Mode and Microprocessor Mode:
Changed
RDY input setup time from 40.
REVISION HISTORY
M16C/6C Group Datasheet
Rev.
Date
Description
Page
Summary
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