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參數(shù)資料
| 型號(hào)： | R5F2L3AACDFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100 |
| 文件頁數(shù)： | 47/74頁 |
| 文件大小： | 959K |
| 代理商： | R5F2L3AACDFP |
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52
2588F–AVR–06/2013
ATtiny261/461/861
rupt will be generated. The start-up time is defined by the SUT and CKSEL Fuses as described
If the low level on the interrupt pin is removed before the device has woken up then program
execution will not be diverted to the interrupt service routine but continue from the instruction fol-
lowing the SLEEP command.
9.3
Register Description
9.3.1
MCUCR – MCU Control Register
The MCU Register contains control bits for interrupt sense control.
Bits 1, 0 – ISC01, ISC00: Interrupt Sense Control 0 Bit 1 and Bit 0
The External Interrupt 0 is activated by the external pin INT0 or INT1 if the SREG I-flag and the
corresponding interrupt mask are set. The level and edges on the external INT0 or INT1 pin that
activate the interrupt are defined in Table 9-2. The value on the INT0 or INT1 pin is sampled
before detecting edges. If edge or toggle interrupt is selected, pulses that last longer than one
clock period will generate an interrupt. Shorter pulses are not guaranteed to generate an inter-
rupt. If low level interrupt is selected, the low level must be held until the completion of the
currently executing instruction to generate an interrupt.
9.3.2
GIMSK – General Interrupt Mask Register
Bit 7 – INT1: External Interrupt Request 1 Enable
When the INT1 bit is set (one) and the I-bit in the Status Register (SREG) is set (one), the exter-
nal pin interrupt is enabled. The Interrupt Sense Control0 bits 1/0 (ISC01 and ISC00) in the MCU
Control Register (MCUCR) define whether the external interrupt is activated on rising and/or fall-
ing edge of the INT1 pin or level sensed. Activity on the pin will cause an interrupt request even
if INT1 is configured as an output. The corresponding interrupt of External Interrupt Request 1 is
executed from the INT1 Interrupt Vector.
Bit 6 – INT0: External Interrupt Request 0 Enable
When the INT0 bit is set (one) and the I-bit in the Status Register (SREG) is set (one), the exter-
nal pin interrupt is enabled. The Interrupt Sense Control0 bits 1/0 (ISC01 and ISC00) in the MCU
Bit
7654
3
2
10
–
PUD
SE
SM1
SM0
–
ISC01
ISC00
MCUCR
Read/Write
R
R/W
R
R/W
Initial Value
0000
0
00
Table 9-2.
Interrupt 0 Sense Control
ISC01
ISC00
Description
0
The low level of INT0 or INT1 generates an interrupt request.
0
1
Any logical change on INT0 or INT1 generates an interrupt request.
1
0
The falling edge of INT0 or INT1 generates an interrupt request.
1
The rising edge of INT0 or INT1 generates an interrupt request.
Bit
76543
210
INT1
INT0
PCIE1
PCIE0
–
–––GIMSK
Read/Write
R/W
R/w
R
Initial Value
00000
000
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| R5F2L3AACDFP#U1 | 制造商:Renesas Electronics Corporation 功能描述: |
| R5F2L3AACDFP#V0 | 制造商:Renesas Electronics Corporation 功能描述:R8C/L3AC 96K+4K/10K 100LQFP14X14 -40-+85 - Trays |
| R5F2L3AACNFA#U0 | 制造商:Renesas Electronics Corporation 功能描述:R8CL3AC 96+4KB 1.8/5.5V -20 TO 85C 100QFP - Trays 制造商:Renesas Electronics Corporation 功能描述:IC MCU 16BIT 96KB FLASH 100LQFP |
| R5F2L3AACNFP#30 | 制造商:Renesas Electronics Corporation 功能描述:IC MCU 16BIT 96KB FLASH 100LQFP 制造商:Renesas Electronics Corporation 功能描述:R8C Series 16 bit 10 kB RAM 96 kB Flash Single Chip Microcontroller SMT-LQFP-100 |
| R5F2L3AACNFP#V0 | 功能描述:MCU 1KB FLASH 96K ROM 100-LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:R8C/Lx/3AC 標(biāo)準(zhǔn)包裝:250 系列:56F8xxx 核心處理器:56800E 芯體尺寸:16-位 速度:60MHz 連通性:CAN，SCI，SPI 外圍設(shè)備:POR，PWM，溫度傳感器，WDT 輸入/輸出數(shù):21 程序存儲(chǔ)器容量:40KB（20K x 16） 程序存儲(chǔ)器類型:閃存 EEPROM 大小:- RAM 容量:6K x 16 電壓 - 電源 (Vcc/Vdd):2.25 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 6x12b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 125°C 封裝/外殼:48-LQFP 包裝:托盤 配用:MC56F8323EVME-ND - BOARD EVALUATION MC56F8323 |
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