參數(shù)資料
型號： R5F2L3AACDFA
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP100
封裝： 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100
文件頁數(shù)： 29/74頁
文件大?。?/td> 959K
代理商： R5F2L3AACDFA
36
2588F–AVR–06/2013
ATtiny261/461/861
7.
Power Management and Sleep Modes
The high performance and industry leading code efficiency makes the AVR microcontrollers an
ideal choise for low power applications. In addition, sleep modes enable the application to shut
down unused modules in the MCU, thereby saving power. The AVR provides various sleep
modes allowing the user to tailor the power consumption to the application’s requirements.
7.1
Sleep Modes
Figure 6-1 on page 24 presents the different clock systems and their distribution in
ATtiny261/461/861. The figure is helpful in selecting an appropriate sleep mode. Table 7-1
shows the different sleep modes and their wake up sources.
Note:
1. For INT0 and INT1, only level interrupt.
2. When PLL selected as system clock.
To enter any of the sleep modes, the SE bit in MCUCR must be written to logic one and a
SLEEP instruction must be executed. The SM1:0 bits in the MCUCR Register select which sleep
mode (Idle, ADC Noise Reduction, Power-down, or Standby) will be activated by the SLEEP
instruction. See Table 7-2 for a summary.
If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU
is then halted for four cycles in addition to the start-up time, executes the interrupt routine, and
resumes execution from the instruction following SLEEP. The contents of the Register File and
SRAM are unaltered when the device wakes up from sleep. If a reset occurs during sleep mode,
the MCU wakes up and executes from the Reset Vector.
Note that if a level triggered interrupt is used for wake-up the changed level must be held for
some time to wake up the MCU (and for the MCU to enter the interrupt service routine). See
7.1.1
Idle Mode
When bits SM1:0 are written to 00, the SLEEP instruction makes the MCU enter Idle mode,
stopping the CPU but allowing Analog Comparator, ADC, Timer/Counter, Watchdog, and the
interrupt system to continue operating. This sleep mode basically halts clk
CPU and clkFLASH, while
allowing the other clocks to run.
Table 7-1.
Active Clock Domains and Wake-up Sources in Different Sleep Modes
Sleep Mode
Active Clock Domains
Osc.
Wake-up Sources
clk
CP
U
clk
FLASH
clk
IO
clk
AD
C
clk
PC
K
clk
PLL
Main
Clo
ck
Source
Enab
led
IN
T0,
INT
1
and
Pin
Cha
nge
SPM
/EEPROM
Read
y
Interrupt
ADC
In
te
rru
p
t
USI
In
te
rru
p
t
Other
I/
O
W
a
tch
dog
In
te
rru
p
t
Idle
XXX
X
XXXX
ADC Noise Reduct.
X
XX(1)
XX
X
Power-down
XX
Standby
XX
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
R5F2L3AACDFA#U0 制造商:Renesas Electronics Corporation 功能描述:IC MCU 16BIT 96KB FLASH
R5F2L3AACDFP#U1 制造商:Renesas Electronics Corporation 功能描述:
R5F2L3AACDFP#V0 制造商:Renesas Electronics Corporation 功能描述:R8C/L3AC 96K+4K/10K 100LQFP14X14 -40-+85 - Trays
R5F2L3AACNFA#U0 制造商:Renesas Electronics Corporation 功能描述:R8CL3AC 96+4KB 1.8/5.5V -20 TO 85C 100QFP - Trays 制造商:Renesas Electronics Corporation 功能描述:IC MCU 16BIT 96KB FLASH 100LQFP
R5F2L3AACNFP#30 制造商:Renesas Electronics Corporation 功能描述:IC MCU 16BIT 96KB FLASH 100LQFP 制造商:Renesas Electronics Corporation 功能描述:R8C Series 16 bit 10 kB RAM 96 kB Flash Single Chip Microcontroller SMT-LQFP-100
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