
A - 18
35.8.1
TRC Register .................................................................................................................................... 706
35.8.2
TRCSR Register .............................................................................................................................. 706
35.8.3
TRCCR1 Register ............................................................................................................................. 706
35.8.4
Count Source Switching ................................................................................................................... 706
35.8.5
Input Capture Function ..................................................................................................................... 707
35.8.6
TRCMR Register in PWM2 Mode ................................................................................................... 707
35.8.7
Count Source fOCO40M .................................................................................................................. 707
35.9
Notes on Timer RD ............................................................................................................................... 708
35.9.1
TRDSTR Register ............................................................................................................................. 708
35.9.2
TRDi Register (i = 0 or 1) ................................................................................................................. 708
35.9.3
TRDSRi Register (i = 0 or 1) ............................................................................................................ 708
35.9.4
TRDCRi Register (i = 0 or 1) ........................................................................................................... 708
35.9.5
Count Source Switch ........................................................................................................................ 709
35.9.6
Input Capture Function ..................................................................................................................... 709
35.9.7
Reset Synchronous PWM Mode ....................................................................................................... 709
35.9.8
Complementary PWM Mode ............................................................................................................ 710
35.9.9
Count Source fOCO40M .................................................................................................................. 713
35.10
Notes on Timer RE ................................................................................................................................ 714
35.10.1
Starting and Stopping Count ............................................................................................................. 714
35.10.2
Register Setting ................................................................................................................................. 714
35.10.3
Time Reading Procedure of Real-Time Clock Mode ....................................................................... 716
35.11
Notes on Serial Interface (UARTi (i = 0 or 1)) ..................................................................................... 717
35.12
Notes on Serial Interface (UART2) ....................................................................................................... 718
35.12.1
Clock Synchronous Serial I/O Mode ................................................................................................ 718
35.12.2
Special Mode 1 (I2C Mode) .............................................................................................................. 719
35.12.3
U2BRG Register ............................................................................................................................... 719
35.12.4
U2TB register ................................................................................................................................... 719
35.13
Notes on Synchronous Serial Communication Unit .............................................................................. 719
35.14
Notes on I2C bus Interface .................................................................................................................... 720
35.14.1
Master Receive Mode ....................................................................................................................... 720
35.14.2
The ICE Bit in the ICCR1 Register and the IICRST Bit in the ICCR2 Register ............................. 720
35.15
Notes on Hardware LIN ........................................................................................................................ 721
35.16
Notes on A/D Converter ........................................................................................................................ 721
35.17
Notes on Flash Memory ........................................................................................................................ 722
35.17.1
CPU Rewrite Mode ........................................................................................................................... 722