參數(shù)資料
型號: R5F21368ANFP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP64
封裝: 10 X 10 MM, 0.50 MM PITCH, PLASTIC, LQFP-64
文件頁數(shù): 44/57頁
文件大小: 477K
代理商: R5F21368ANFP
R8C/36A Group
5. Electrical Characteristics
REJ03B0265-0110 Rev.1.10 Sep 28, 2009
Page 49 of 55
Under development Preliminary specification
Specifications in this manual are tentative and subject to change.
i = 0 to 2
Figure 5.16
Serial Interface Timing Diagram when VCC = 3 V
Notes:
1. When selecting the digital filter by the INTi input filter select bit, use an INTi input HIGH width of either (1/digital filter clock
frequency × 3) or the minimum value of standard, whichever is greater.
2. When selecting the digital filter by the INTi input filter select bit, use an INTi input LOW width of either (1/digital filter clock
frequency × 3) or the minimum value of standard, whichever is greater.
Figure 5.17
Input Timing Diagram for External Interrupt INTi and Key Input Interrupt KIi
when VCC = 3 V
Table 5.29
Serial Interface
Symbol
Parameter
Standard
Unit
Min.
Max.
tc(CK)
CLKi input cycle time
300
ns
tW(CKH)
CLKi input “H” width
150
ns
tW(CKL)
CLKi Input “L” width
150
ns
td(C-Q)
TXDi output delay time
80
ns
th(C-Q)
TXDi hold time
0—
ns
tsu(D-C)
RXDi input setup time
70
ns
th(C-D)
RXDi input hold time
90
ns
Table 5.30
External Interrupt INTi (i = 0 to 4) Input, Key Input Interrupt KIi (i = 0 to 3)
Symbol
Parameter
Standard
Unit
Min.
Max.
tW(INH)
INTi input “H” width, KIi input “H” width
380 (1)
—ns
tW(INL)
INTi input “L” width, KIi input “L” width
380 (2)
—ns
tW(CKH)
tC(CK)
tW(CKL)
th(C-Q)
th(C-D)
tsu(D-C)
td(C-Q)
CLKi
TXDi
RXDi
VCC = 3 V
i = 0 to 2
tW(INL)
tW(INH)
VCC = 3 V
INTi input
(i = 0 to 4)
KIi input
(i = 0 to 3)
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