參數(shù)資料
型號(hào): R5F212BASDFA
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PQFP48
封裝: 14 X 14 MM, 0.80 MM PITCH, PLASTIC, LQFP-48
文件頁數(shù): 64/138頁
文件大小: 492K
代理商: R5F212BASDFA
243
4317K–AVR–03/2013
AT90PWM2/3/2B/3B
21.6.3
Offset Compensation Schemes
The gain stage has a built-in offset cancellation circuitry that nulls the offset of differential mea-
surements as much as possible. The remaining offset in the analog path can be measured
directly by shortening both differential inputs using the AMPxIS bit with both inputs unconnected.
tracted in software from the measurement results. Using this kind of software based offset
correction, offset on any channel can be reduced below one LSB.
21.6.4
ADC Accuracy Definitions
An n-bit single-ended ADC converts a voltage linearly between GND and V
REF in 2
n steps
(LSBs). The lowest code is read as 0, and the highest code is read as 2
n-1.
Several parameters describe the deviation from the ideal behavior:
Offset: The deviation of the first transition (0x000 to 0x001) compared to the ideal transition
(at 0.5 LSB). Ideal value: 0 LSB.
Figure 21-10. Offset Error
Gain Error: After adjusting for offset, the Gain Error is found as the deviation of the last
transition (0x3FE to 0x3FF) compared to the ideal transition (at 1.5 LSB below maximum).
Ideal value: 0 LSB
Output Code
VREF Input Voltage
Ideal ADC
Actual ADC
Offset
Error
相關(guān)PDF資料
PDF描述
R5F212BASDFP 16-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PQFP48
R5F212BASNFA 16-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PQFP48
R5F212ACSDFP 16-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PQFP48
R5F212BCSNFP 16-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PQFP48
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