參數(shù)資料
型號: R5F211A4DSP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PDSO20
封裝: 4.40 X 6.50 MM, 0.65 MM PITCH, PLASTIC, LSSOP-20
文件頁數(shù): 21/51頁
文件大?。?/td> 438K
代理商: R5F211A4DSP
R8C/1A Group, R8C/1B Group
5. Electrical Characteristics
Rev.1.40
Dec 08, 2006
Page 26 of 45
REJ03B0144-0140
NOTES:
1.
VCC = 2.7 to 5.5 V at Topr = 0 to 60
°C, unless otherwise specified.
2.
Definition of programming/erasure endurance
The programming and erasure endurance is defined on a per-block basis.
If the programming and erasure endurance is n (n = 100 or 10,000), each block can be erased n times. For example, if 1,024
1-byte writes are performed to block A, a 1 Kbyte block, and then the block is erased, the programming/erasure endurance
still stands at one. However, the same address must not be programmed more than once per erase operation (overwriting
prohibited).
3.
Endurance to guarantee all electrical characteristics after program and erase. (1 to Min. value can be guaranteed).
4.
If emergency processing is required, a suspend request can be generated independent of this characteristic. In that case the
normal time delay to suspend can be applied to the request. However, we recommend that a suspend request with an
interval of less than 650
s is only used once because, if the suspend state continues, erasure cannot operate and the
incidence of erasure error rises.
5.
In a system that executes multiple programming operations, the actual erasure count can be reduced by writing to sequential
addresses in turn so that as much of the block as possible is used up before performing an erase operation. For example,
when programming groups of 16 bytes, the effective number of rewrites can be minimized by programming up to 128 groups
before erasing them all in one operation. In addition, averaging the number of erase operations between block A and block B
can further reduce the effective number of rewrites. It is also advisable to retain data on the erase count of each block and
limit the number of erase operations to a certain number.
6.
If an error occurs during block erase, attempt to execute the clear status register command, then execute the block erase
command at least three times until the erase error does not occur.
7.
Customers desiring programming/erasure failure rate information should contact their Renesas technical support
representative.
8.
The data hold time includes time that the power supply is off or the clock is not supplied.
Table 5.4
Flash Memory (Program ROM) Electrical Characteristics
Symbol
Parameter
Conditions
Standard
Unit
Min.
Typ.
Max.
Program/erase endurance(2)
R8C/1A Group
times
R8C/1B Group
1,000(3)
times
Byte program time
50
400
s
Block erase time
0.4
9
s
td(SR-SUS)
Time delay from suspend request until
suspend
97+CPU clock
× 6 cycles
s
Interval from erase start/restart until
following suspend request
650
s
Interval from program start/restart until
following suspend request
0
ns
Time from suspend until program/erase
restart
3+CPU clock
× 4 cycles
s
Program, erase voltage
2.7
5.5
V
Read voltage
2.7
5.5
V
Program, erase temperature
0
60
°C
Data hold time(8)
Ambient temperature = 55
°C20
year
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