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參數(shù)資料
| 型號： | Q67120-C508 |
| 英文描述： | IC-SM-8-BIT CPU 12-MHZ |
| 中文描述： | 集成電路釤8位CPU的12兆赫 |
| 文件頁數(shù)： | 18/121頁 |
| 文件大?。?/td> | 1000K |
| 代理商： | Q67120-C508 |
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Semiconductor Group
2-2
Fundamental Structure
C501
2.1
CPU
The C501 is efficient both as a controller and as an arithmetic processor. It has extensive facilities
for binary and BCD arithmetic and excels in its bit-handling capabilities. Efficient use of program
memory results from an instruction set consisting of 44% one-byte, 41% two-byte, and 15% three-
byte instructions. With a 12 MHz crystal, 58% of the instructions execute in 1.0
μ
s (24 MHz : 500 ns,
40 MHz : 300 ns).
The CPU (Central Processing Unit) of the C501 consists of the instruction decoder, the arithmetic
section and the program control section. Each program instruction is decoded by the instruction
decoder. This unit generates the internal signals controlling the functions of the individual units
within the CPU. They have an effect on the source and destination of data transfers and control the
ALU processing.
The arithmetic section of the processor performs extensive data manipulation and is comprised of
the arithmetic/logic unit (ALU), an A register, B register and PSW register.
The ALU accepts 8-bit data words from one or two sources and generates an 8-bit result under the
control of the instruction decoder. The ALU performs the arithmetic operations add, substract,
multiply, divide, increment, decrement, BDC-decimal-add-adjust and compare, and the logic
operations AND, OR, Exclusive OR, complement and rotate (right, left or swap nibble (left four)).
Also included is a Boolean processor performing the bit operations as set, clear, complement, jump-
if-not-set, jump-if-set-and-clear and move to/from carry. Between any addressable bit (or its
complement) and the carry flag, it can perform the bit operations of logical AND or logical OR with
the result returned to the carry flag.
The program control section controls the sequence in which the instructions stored in program
memory are executed. The 16-bit program counter (PC) holds the address of the next instruction to
be executed. The conditional branch logic enables internal and external events to the processor to
cause a change in the program execution sequence.
Accumulator
ACC is the symbol for the accumulator register. The mnemonics for accumulator-specific
instructions, however, refer to the accumulator simply as A.
Program Status Word
The Program Status Word (PSW) contains several status bits that reflect the current state of the
CPU.
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