
Semiconductor Group
6-11
On-Chip Peripheral Components
C501
6.1.3.2 Port Loading and Interfacing
The output buffers of ports 1, 2 and 3 can drive TTL inputs directly. The maximum port load which
still guarantees correct logic output levels can be looked up in the C501 DC characteristics in
chapter 10
. The corresponding parameters are
V
OL
and
V
OH
.
The same applies to port 0 output buffers. They do, however, require external pullups to drive
floating inputs, except when being used as the address/data bus.
When used as inputs it must be noted that the ports 1, 2 and 3 are not floating but have internal
pullup transistors. The driving devices must be capable of sinking a sufficient current if a logic low
level shall be applied to the port pin (the parameters
I
TL
and
I
IL
in the C501 DC characteristics
specify these currents). Port 0 has floating inputs when used for digital input.
6.1.3.3
Read-Modify-Write Feature of Ports 1,2 and 3
Some port-reading instructions read the latch and others read the pin. The instructions reading the
latch rather than the pin read a value, possibly change it, and then rewrite it to the latch. These are
called “read-modify-write”- instructions, which are listed in
table 6-5
. If the destination is a port or a
port pin, these instructions read the latch rather than the pin. Note that all other instructions which
can be used to read a port, exclusively read the port pin. In any case, reading from latch or pin,
respectively, is performed by reading the SFR P0, P1, P2 and P3; for example, “MOV A, P3” reads
the value from port 3 pins, while “ANL P3, #0AAH” reads from the latch, modifies the value and
writes it back to the latch.
It is not obvious that the last three instructions in
table 6-5
are read-modify-write instructions, but
they are. The reason is that they read the port byte, all 8 bits, modify the addressed bit, then write
the complete byte back to the latch.