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參數(shù)資料
| 型號： | Q67060-S7411-A803 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類： | 通用總線功能 |
| 英文描述： | High Speed CMOS Logic Decade Counter/Divider with 10 Decoded Outputs 16-TSSOP -55 to 125 |
| 中文描述： | 智能阻抗高側電源開關 |
| 文件頁數(shù)： | 2/16頁 |
| 文件大?。?/td> | 262K |
| 代理商： | Q67060-S7411-A803 |
Data sheet BTS 6143 D
Infineon Technologies AG
2 of 16
2003-Oct-01
Pin
Symbol
Function
1
OUT
O
Output;
output to the load; pin 1 and 5 must be externally shorted* .
Input;
activates the power switch if shorted to ground.
Supply Voltage;
positive power supply voltage; tab and pin3 are internally
shorted.
2
IN
I
Tab/(3)
Vbb
+
4
IS
S
Sense Output;
Diagnostic feedback; provides at normal operation a sense
current proportional to the load current; in case of overload,
overtemperature and/or short circuit a defined current is provided (see
Truth Table on page 8)
5
OUT
O
Output;
output to the load; pin 1 and 5 must be externally shorted* .
*) Not shorting all outputs will considerably increase the on-state resistance, reduce the peak current capability
and decrease the current sense accuracy
Maximum Ratings
at
T
j
= 25 °C unless otherwise specified
Parameter
Supply voltage (overvoltage protection see page 4)
Supply voltage for full short circuit protection
1)
Load dump protection
V
LoadDump
=
U
A
+
V
s
,
U
A
= 13.5 V
R
I
= 2
,
R
L
= 1.5
,
t
d
= 400 ms, IN= low or high
Load current (Short-circuit current, see page 5)
Operating temperature range
Storage temperature range
Power dissipation (DC)
Inductive load switch-off energy dissipation
3)
single pulse
I
L
= 20 A,
V
bb
= 12V
Electrostatic discharge capability (ESD)
(Human Body Model)
acc.
ESD assn. std. S5.1-1993; R=1.5k
; C=100pF
Current through input pin (DC)
Current through current sense pin (DC)
see internal circuit diagrams page 9
Input voltage slew rate
Symbol
V
bb
V
bb
V
Load dump2
)
Values
Unit
38
30
45
V
V
V
I
L
T
j
T
stg
P
tot
E
AS
self-limited
-40 ...+150
-55 ...+150
A
°C
59
W
T
j
=150 °C:
0.3
J
V
ESD
3.0
kV
I
IN
I
IS
+15, -120
+15, -120
mA
V
bb
≤
16V :
V
bb
> 16V
4)
:
d
V
bIN
/ d
t
self-limited
20
V/
μ
s
1)
Short circuit is defined as a combination of remaining resistances and inductances. See schematic on
page11.
2)
V
Load dump
is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839
3)
See also diagram on page 11.
4)
See also on page 8. Slew rate limitation can be achieved by means of using a series resistor
R
IN
in the input
path. This resistor is also required for reverse operation. See also page 10.
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