參數(shù)資料
型號: Q67060-S6302-A3
廠商: SIEMENS AG
英文描述: High Speed CMOS Logic Dual 4-Stage Static Shift Registers 16-PDIP -55 to 125
中文描述: 智能雙通道阻抗高側(cè)電源開關(guān)
文件頁數(shù): 4/14頁
文件大?。?/td> 191K
代理商: Q67060-S6302-A3
BTS 611 L1
Parameter and Conditions,
each channel
at T
j
= 25 °C, V
bb
= 12 V unless otherwise specified
Symbol
Values
typ
Unit
min
max
Semiconductor Group
4
Operating Parameters
Operating voltage
6
)
Undervoltage shutdown
Undervoltage restart
T
j
=-40...+150°C:
T
j
=-40...+150°C:
T
j
=-40...+25°C:
T
j
=+150°C:
V
bb(on)
V
bb(under)
V
bb(u rst)
5.0
3.5
--
--
--
34
5.0
5.0
7.0
7.0
V
V
V
--
Undervoltage restart of charge pump
see diagram page 13
Undervoltage hysteresis
V
bb(under)
= V
bb(u rst)
- V
bb(under)
Overvoltage shutdown
Overvoltage restart
Overvoltage hysteresis
Overvoltage protection
7
)
I
bb
=40 mA
Standby current (pin 4)
V
IN
=0
V
bb(ucp)
--
5.6
V
V
bb(under)
--
0.2
--
V
T
j
=-40...+150°C:
T
j
=-40...+150°C:
T
j
=-40...+150°C:
T
j
=-40...+150°C:
V
bb(over)
V
bb(o rst)
V
bb(over)
V
bb(AZ)
34
33
--
42
--
--
43
--
--
--
V
V
V
V
0.5
47
T
j
=-40...+25°C
:
T
j
= 150°C:
I
bb(off)
--
--
--
14
17
--
30
35
12
μ
A
Leakage output current (included in I
bb(off)
)
V
IN
=0
Operating current (Pin 2)
8)
, V
IN
=5 V
both channels on, T
j
=-40...+150°C
Operating current (Pin 2)
8)
one channel on, T
j
=-40...+150°C:
I
L(off)
μ
A
I
GND
--
4
6
mA
I
GND
--
2
3
mA
6)
At supply voltage increase up to V
bb
= 5.6 V typ without charge pump, V
OUT
V
bb
- 2 V
7)
See also V
ON(CL)
in table of protection functions and circuit diagram page 8.
8
)
Add I
ST
, if I
ST
> 0, add I
IN
, if V
IN
>5.5 V
相關(guān)PDF資料
PDF描述
Q67060-S6302-A4 High Speed CMOS Logic Dual 4-Stage Static Shift Registers 16-SOIC -55 to 125
Q67060-S6307-A5 High Speed CMOS Logic Dual 4-Stage Static Shift Registers 16-SOIC -55 to 125
Q67060-S6307-A6 High Speed CMOS Logic Dual 4-Stage Static Shift Registers 16-SOIC -55 to 125
Q67060-S6307-A7 High Speed CMOS Logic Quad Bilateral Switches 14-PDIP -55 to 125
Q67060-S6500-A2 TRANSISTOR HITFET
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