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參數(shù)資料
| 型號(hào)： | PZTA64 |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 小信號(hào)晶體管 |
| 英文描述： | PNP Darlington Transistor |
| 中文描述： | 1200 mA, PNP, Si, SMALL SIGNAL TRANSISTOR |
| 封裝： | SOT-223, 4 PIN |
| 文件頁(yè)數(shù)： | 4/6頁(yè) |
| 文件大?。?/td> | 170K |
| 代理商： | PZTA64 |
4
Motorola Small–Signal Transistors, FETs and Diodes Device Data
INFORMATION FOR USING THE SOT-223 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.079
2.0
0.15
3.8
0.248
6.3
0.079
2.0
0.059
1.5
0.059
1.5
0.059
1.5
0.091
2.3
mm
inches
0.091
2.3
SOT-223
SOT-223 POWER DISSIPATION
The power dissipation of the SOT-223 is a function of the
pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipation.
Power dissipation for a surface mount device is determined
by TJ(max), the maximum rated junction temperature of the
die, R
θ
JA, the thermal resistance from the device junction to
ambient, and the operating temperature, TA. Using the
values provided on the data sheet for the SOT-223 package,
PD can be calculated as follows:
TJ(max) – TA
R
θ
JA
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature TA of 25
°
C, one can
calculate the power dissipation of the device which in this
case is 1.5 watts.
PD =
PD =
150
°
C – 25
°
C
83.3
°
C/W
= 1.5 watts
The 83.3
°
C/W for the SOT-223 package assumes the use
of the recommended footprint on a glass epoxy printed circuit
board to achieve a power dissipation of 1.5 watts. There are
other alternatives to achieving higher power dissipation from
the SOT-223 package. One is to increase the area of the
collector pad. By increasing the area of the collector pad, the
power dissipation can be increased. Although the power
dissipation can almost be doubled with this method, area is
taken up on the printed circuit board which can defeat the
purpose of using surface mount technology. A graph of R
θ
JA
versus collector pad area is shown in Figure 5.
0.8 Watts
1.25 Watts*
1.5 Watts
R
θ
J
t
°
A, Area (square inches)
0.0
0.2
0.4
0.6
0.8
1.0
160
140
120
100
80
Figure 5. Thermal Resistance versus Collector
Pad Area for the SOT-223 Package (Typical)
Board Material = 0.0625
″
G-10/FR-4, 2 oz Copper
TA = 25
°
C
*Mounted on the DPAK footprint
Another alternative would be to use a ceramic substrate or
an aluminum core board such as Thermal Clad
. Using a
board material such as Thermal Clad, an aluminum core
board, the power dissipation can be doubled using the same
footprint.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PZTA64_Q | 功能描述:達(dá)林頓晶體管 PNP Transistor Darlington RoHS:否 制造商:Texas Instruments 配置:Octal 晶體管極性:NPN 集電極—發(fā)射極最大電壓 VCEO:50 V 發(fā)射極 - 基極電壓 VEBO: 集電極—基極電壓 VCBO: 最大直流電集電極電流:0.5 A 最大集電極截止電流: 功率耗散: 最大工作溫度:+ 150 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-18 封裝:Reel |
| PZTA64T1 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:PNP SILICON DARLINGTON TRANSISTOR SURFACE MOUNT |
| PZTA65 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:PNP Darlington Transistor |
| PZTA92 | 功能描述:兩極晶體管 - BJT PNP Transistor High Voltage RoHS:否 制造商:STMicroelectronics 配置: 晶體管極性:PNP 集電極—基極電壓 VCBO: 集電極—發(fā)射極最大電壓 VCEO:- 40 V 發(fā)射極 - 基極電壓 VEBO:- 6 V 集電極—射極飽和電壓: 最大直流電集電極電流: 增益帶寬產(chǎn)品fT: 直流集電極/Base Gain hfe Min:100 A 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PowerFLAT 2 x 2 |
| PZTA92 T/R | 功能描述:兩極晶體管 - BJT TRANS HV TAPE-7 RoHS:否 制造商:STMicroelectronics 配置: 晶體管極性:PNP 集電極—基極電壓 VCBO: 集電極—發(fā)射極最大電壓 VCEO:- 40 V 發(fā)射極 - 基極電壓 VEBO:- 6 V 集電極—射極飽和電壓: 最大直流電集電極電流: 增益帶寬產(chǎn)品fT: 直流集電極/Base Gain hfe Min:100 A 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PowerFLAT 2 x 2 |
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