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Zarlink Semiconductor Inc.
PX5419A
12 x 3.6 Gb/s VCSEL Driver with ACJTAG
Product Brief
October 2005
Features
12x3.6 Gb/s VCSEL Driver
Single +3.3V supply dissipating 100 mW
per channel
Serial digital interface for global and
individual channel control
Individual channel control for enable,
modulation and bias current
On-chip adjustable VCSEL temperature
compensation
Analog control input for closed-loop
optical power optimization
VCSEL open/short detection with
autonomous fault handling
250-micron channel pitch matches
optical ribbon fiber and array VCSELs
Differential CML and LVPECL compatible
inputs with on-chip termination
ACJTAG boundary scan testability
Applications
SNAP12 MSA
OC-768 VSR parallel optics
Proprietary 40 Gb/s intra-system parallel optics
Infiniband
TM
12X parallel optics PMD
Description
The growing use of the Internet has created
increasingly higher demand for multi-Gb/s I/O
performance. The demand for 100 Gb/s+
WAN bandwidth fuels the growth of short-reach
40 Gb/s infrastructures within high-end telco
and datacom routers, switches, servers and
other proprietary chassis-to-chassis links.
The Zarlink PX5419A 12X3 Gb/s VCSEL
Driver* with ACJTAG is a twelve-channel
VCSEL driver designed for various 12x3 Gb/s
parallel PMD applications. It consists of a DC-
coupled amplifier with selectable modulation
and bias currents optimized for driving
commercially available, common cathode
VCSELs from a single +3.3 V supply.
Individual channel settings are used to control
the modulation and bias current and their
temperature coefficients, allowing the optical
output power and extinction ratio to be
optimized. Data controlling the Primarion
PX5419A VCSEL Driver settings is loaded by a
simple four-wire CMOS serial interface that
features read/write capabilities.
The Primarion PX5419A Driver provides full
ACJTAG support for boundary scan testability,
allowing either AC or DC module connectivity
validation and systems test.