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Zarlink Semiconductor Inc.
PX5524
4 x 4 Gb/s TIA/LA Receiver
Product Brief
Features
4-channel integrated transimpedance and liming
amplifier operates up to 4.25 Gb/s
8 uA
PP
receiver sensitivity for 10
-12
BER
Single +3.3V supply dissipating 105 mW per
channel
Individual channel signal detect compares input
signal strength (OMA) with adjustable threshold
Global signal detect compares quiescent
photocurrent with adjustable threshold
Squelch automatically disables output when
input signal strength falls below programmable
threshold
Serial digital interface for controlling channel
enable and signal detect features
Reconfigurable I/O provides access to serial
digital interface and dedicated channel signal
detect outputs
250-micron channel pitch matches optical ribbon
fiber and photodiode arrays
Applications
10GbE LX-4 optical modules
4-lane 4GFC, OC-48 VSR, Infiniband
TM
parallel
optical modules
Proprietary parallel optical modules and CWDM
Proprietary 4-lane intra-system parallel optics
Description
The growing use of the Internet has created
increasingly higher demand for multi-Gb/s I/O
performance. The demand for 40+ Gb/s WAN
bandwidth fuels the growth of short-reach 10
Gb/s infrastructures within high-end telco and
datacom routers, switches, servers and other
proprietary chassis-to-chassis links. The Zarlink
PX5524 4 Gb/s TIA/LA Receiver is a four-channel
TIA/LA optical receiver designed for various 4x4
Gb/s
parallel
optics
applications. It consists of a DC-coupled
transimpedance amplifier and an AC-coupled
differential limiting amplifier.
and
CWDM
PMD
The transimpedance amplifier achieves a nominal
3 GHz bandwidth over a wide range of
photodiode input capacitance. Excellent channel-
to-channel isolation ensures data integrity at the
receiver sensitivity limits. A global signal detect
circuit provides the photodiode reverse bias
voltage supply and senses average photocurrent
supplied to the photodiode array.
The transimpedance amplifier is AC-coupled
internally
to
a
high-gain,
differential limiting amplifier. The limiting
amplifier provides a differential back-terminated
CML output that can be used to drive 4 Gb/s per
channel transceivers or other CML compatible
clock and data recovery circuits. The limiting
amplifier features an adjustable signal detect
circuit that senses optical modulation amplitude
(OMA) to provide a received signal indication for
each channel.
high-bandwidth
April 2006