參數(shù)資料
型號： PWL6030B1AECMR
廠商： TEXAS INSTRUMENTS INC
元件分類： 電源管理
英文描述： 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA187
封裝： 7 X 7 MM, 0.40 MM PITCH, GREEN, FCBGA-187
文件頁數(shù)： 46/97頁
文件大?。?/td> 937K
代理商： PWL6030B1AECMR
SWCS045B
– SEPTEMBER 2010 – REVISED JUNE 2011
Group 2: Peripherals group
—connectivity devices (CON) → Logical OR between PREQ2A, PREQ2B, and
PREQ2C
Group 3: Cellular modem group (MOD)
→ PREQ3
PREQ signals can be masked by register bits PREQ2A, PREQ2B, and PREQ2C sharing the same mask bit.
PREQ1, PREQ2A, PREQ2B, PREQ2C, and PREQ3 are supplied on the VIO voltage domain. The default
polarity of the signals is active high (group is active) and it can be selected by the register bit.
SmartReflex Software Commands
Only SMPS SmartReflex-compliant resources can be accessed by the SR-I2C. In addition to hardware
commands, SmartReflex-compliant power resources receive additional commands with the SR-I2C. These
commands affect the voltage setting of the SMPS, depending on the related voltage domain state. The slew rate
of voltage changes is controlled with a step register. For non-SmartReflex supplies, the voltage register is used
for voltage selection (for supplies having programmable output voltages). A SmartReflex command does not
change the state of the group.
Boot Pins
The TWL6030 device has four input balls (Boot[3:0]) to select boot sequence executed at startup. These balls
provide an indication on the following parameters to select the correct value for the supply voltages and detection
thresholds:
BOOT0: Battery chemistry (cut-off voltage)
BOOT1: LPDDR2 (voltage/sequence)
BOOT2: eMMC (voltage)
BOOT3: Platform (sequence)
Table 12. BOOT[3:0]
BOOT
STATE
EFFECT
High thresholds are selected for
0
VBATMIN_LO and VBATMIN_HI.
BOOT0
Low thresholds are selected for
1
VBATMIN_LO and VBATMIN_HI.
OMAP4430 PMIC: S4A LPDDR2 memories
are used. VMEM supplies the LPDDR2 core
at 1.35 V.
0
OMAP4460/4470 PMIC: VMEM is not
controlled by startup sequence.
BOOT1
OMAP4430 PMIC: S4B LPDDR2 memories
are used. VMEM supplies the LPDDR2 core
at 1.2 V.
1
OMAP4460/4470 PMIC: VMEM is turned ON
by startup sequence. Output voltage is 1.2 V
0
VAUX1 is used to supply eMMC at 2.8 V.
BOOT2
1
VAUX1 is used to supply eMMC at 1.8 V.
VAUX1 is disabled during power-up
0
sequence (pulldown asserted).
VAUX1 is enabled during power-up
BOOT3
sequence (BOOT2 configuring the voltage).
1
For example, see the OMAP4 power-up
sequence.
NOTE
OMAP4430 PMIC part numbers are TWL6030B107, TWL6030B1AE, and TWL6030B1A0.
OMAP4460/4470 PMIC part numbers are TWL6030B1A4, TWL6030B1AF, and TWL6030B1AA.
Battery Comparator Thresholds
Three thresholds of battery voltage condition the system state transitions:
50
Copyright
2010–2011, Texas Instruments Incorporated
相關(guān)PDF資料
PDF描述
PWL6030B1AECMRR 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA187
PWL6030B1A4CMRR 1-CHANNEL POWER SUPPLY SUPPORT CKT, PBGA187
PWL6030B1AFCMRR 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA187
PWL6030B1A0CMRR 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA187
PWL6030B1A0CMR 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA187
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