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SWCS046C – MARCH 2010 – REVISED JUNE 2010
Bits
Field Name
Description
Type
Reset
2
AUTO_COMP
0: No auto compensation
RW
0
1: Auto compensation enabled
1
ROUND_30S
0: No update
RW
0
1: When a one is written, the time is rounded to the closest minute.
This bit is a toggle bit, the micro-controller can only write one and RTC
clears it. If the micro-controller sets the ROUND_30S bit and then read it,
the micro-controller will read one until the rounded to the closet.
0
STOP_RTC
0: RTC is frozen
RW
0
1: RTC is running
Table 28. RTC_STATUS_REG
Address Offset
0x11
Physical Address
Instance
Description
RTC status register:
NOTES: A dummy read of this register is necessary before each I2C read in order to update the status
register value.
Type
RW
7
6
5
4
3
2
1
0
POWER_UP
ALARM
EVENT_1D
EVENT_1H
EVENT_1M
EVENT_1S
RUN
Reserved
Bits
Field Name
Description
Type
Reset
7
POWER_UP
Indicates that a reset occurred (bit cleared to 0 by writing 1).
RW
1
POWER_UP is set by a reset, is cleared by writing one in this bit.
6
ALARM
Indicates that an alarm interrupt has been generated (bit clear by writing
RW
0
1).
The alarm interrupt keeps its low level, until the micro-controller write 1 in
the ALARM bit of the RTC_STATUS_REG register.
The timer interrupt is a low-level pulse (15 s duration).
5
EVENT_1D
One day has occurred
RO
0
4
EVENT_1H
One hour has occurred
RO
0
3
EVENT_1M
One minute has occurred
RO
0
2
EVENT_1S
One second has occurred
RO
0
1
RUN
0: RTC is frozen
RO
0
1: RTC is running
This bit shows the real state of the RTC, indeed because of STOP_RTC
signal was resynchronized on 32-kHz clock, the action of this bit is
delayed.
0
Reserved
Reserved bit
RO
0
R returns
0s
Table 29. RTC_INTERRUPTS_REG
Address Offset
0x12
Physical Address
Instance
Description
RTC interrupt control register
Type
RW
Copyright 2010, Texas Instruments Incorporated
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