參數(shù)資料
型號： PTPS659104A1RSL
廠商： TEXAS INSTRUMENTS INC
元件分類： 電源管理
英文描述： POWER SUPPLY SUPPORT CKT, PQCC48
封裝： 6 X 6 MM, 1 MM HEIGHT, GREEN, PLASTIC,VQFN-48
文件頁數(shù)： 82/89頁
文件大小： 941K
代理商： PTPS659104A1RSL
PRODUCTPREVIEW
www.ti.com
SWCS046C – MARCH 2010 – REVISED JUNE 2010
Table 77. GPIO0_REG (continued)
Type
RW
7
6
5
4
3
2
1
0
Reserved
GPIO_DEB
GPIO_PUEN
GPIO_CFG
GPIO_STS
GPIO_SET
Bits
Field Name
Description
Type
Reset
7:5
Reserved
Reserved bit
RO
0x0
R returns
0s
4
GPIO_DEB
GPIO input debouncing time configuration:
RW
0
When 0, the debouncing is 91.5 s using a 30.5 s clock rate
When 1, the debouncing is 150 ms using a 50 ms clock rate
3
GPIO_PUEN
GPIO pad pull-up control:
RW
1
1: Pull-up is enabled
0: Pull-up is disabled
2
GPIO_CFG
Configuration of the GPIO pad direction:
RW
0
When 0, the pad is configured as an input
When 1, the pad is configured as an output
1
GPIO_STS
Status of the GPIO pad
RO
1
0
GPIO_SET
Value set on the GPIO output when configured in output mode
RW
0
Table 78. JTAGVERNUM_REG
Address Offset
0x80
Physical Address
Instance
Description
Silicon version number
Type
RO
7
6
5
4
3
2
1
0
Reserved
VERNUM
Bits
Field Name
Description
Type
Reset
7:4
Reserved
Reserved bit
RO
0x0
R returns
0s
3:0
VERNUM
Value depending on silicon version number 0000 - Revision 1.0
RO
0x0
GLOSSARY
ACRONYMS, ABBREVIATIONS, AND DEFINITIONS
ACRONYM
DEFINITION
DDR
Dual-Data Rate (memory)
ES
Engineering Sample
ESD
Electrostatic Discharge
FET
Field Effect Transistor
EPC
Embedded Power Controller
FSM
Finite State Machine
Copyright 2010, Texas Instruments Incorporated
83
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