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ELECTRICAL CHARACTERISTICS
SLTS264J – NOVEMBER 2005 – REVISED JUNE 2009 ................................................................................................................................................... www.ti.com
PTH08T240W
TA = 25°C, VI = 5 V, VO = 3.3 V, CI = 220 F, CO = 220 F, and IO = IO max (unless otherwise stated)
PARAMETER
TEST CONDITIONS
PTH08T240W
UNIT
MIN
TYP
MAX
IO
Output current
Over VO range
25°C, natural convection
0
10
A
0.69
≤ VO ≤ 1.2
4.5
14 (1)
VI
Input voltage range
Over IO range
1.2 < VO ≤ 3.6
4.5
14
V
3.6 < VO ≤ 5.5
VO + 2
14
VOADJ
Output voltage adjust range
Over IO range
0.69
5.5
V
Set-point voltage tolerance
±0.5
±1 (2)
%Vo
Temperature variation
–40°C < TA < 85°C
±0.3
%Vo
VO
Line regulaltion
Over VI range
±3
mV
Load regulation
Over IO range
±2
mV
Total output variation
Includes set-point, line, load, –40°C
≤ TA ≤ 85°C
±1.5 (2)
%Vo
RSET = 171 , VI = 8 V, VO = 5.0 V
95%
RSET = 1.21 k, VO = 3.3 V
94%
RSET = 2.38 k, VO = 2.5 V
92%
η
Efficiency
IO = 10 A
RSET = 4.78 k, VO = 1.8 V
90%
RSET = 7.09 k, VO = 1.5 V
88%
RSET = 12.1 k, VO = 1.2 V
87%
RSET = 20.8 k, VO = 1.0 V
85%
VO Ripple (peak-to-peak)
20-MHz bandwidth
10 (1)
mVPP
ILIM
Overcurrent threshold
Reset, followed by auto-recovery
20
A
ttr
Recovery time
35
s
w/o TurboTrans
CO = 220 F, TypeC
ΔVtr
2.5 A/s load step
VO over/undershoot
165
mV
Transient response
50 to 100% IOmax
ttrTT
w/ TurboTrans
Recovery time
130
s
VO = 2.5 V
CO = 2000 F, TypeC,
mV
ΔVtrTT
VO over/undershoot
30
RTT = 0
IIL
Track input current (pin 10)
Pin to GND
–130(3)
A
dVtrack/dt
Track slew rate capability
CO ≤ CO (max)
1
V/ms
VI increasing, RUVLO = OPEN
4.3
4.45
Adjustable Under-voltage lockout
UVLOADJ
VI decreasing, RUVLO = OPEN
3.7
4.2
V
(pin 11)
Hysteresis, RUVLO ≤ 52.3 k
0.5
Input high voltage (VIH)
Open(4)
V
Inhibit control (pin 11)
Input low voltage (VIL)
-0.2
0.8
Input low current (IIL), Pin 11 to GND
-235
A
Iin
Input standby current
Inhibit (pin 11) to GND, Track (pin 10) open
5
mA
f s
Switching frequency
Over VI and IO ranges, SmartSync (pin 1) to GND
300
kHz
Synchronization (SYNC)
fSYNC
240
400
kHz
frequency
VSYNCH
SYNC High-Level Input Voltage
2
5.5
V
VSYNCL
SYNC Low-Level Input Voltage
0.8
V
tSYNC
SYNC Minimum Pulse Width
200
nSec
(1)
For output voltages
≤ 1.2 V, at nominal operating frequency, the output ripple may increase (typically 2×) when operating at input
voltages greater than (VO × 11). When using the SmartSync feature to adjust the switching frequency, see the SmartSync
Considerations section of the datasheet for further guidance.
(2)
The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a
tolerance of 1% with 100 ppm/C or better temperature stability.
(3)
A low-leakage (<100 nA), open-drain device, such as MOSFET or voltage supervisor IC, is recommended to control pin 10. The
open-circuit voltage is less than 8 Vdc.
(4)
This control pin has an internal pull-up. Do not place an external pull-up on this pin. If it is left open-circuit, the module operates when
input power is applied. A small, low-leakage (<100 nA) MOSFET is recommended for control. For additional information, see the related
application information section.
4
Copyright 2005–2009, Texas Instruments Incorporated