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Alarm Function
Related register
Addr.
(hex)
Bit 7
Bit 6
Bit 5
PT0205(02/07)
Ver: 1
12
Data Sheet
PT7C4337
Real-time Clock Module (I
2
C Bus)
Register definition
Bit 4
Function
Bit 3
Bit 2
Bit 1
Bit 0
00
Seconds
0
S40
S20
S10
S8
S4
S2
S1
01
Minutes
0
M40
M20
M10
M8
M4
M2
M1
02
Hours
0
12, /24
H20 or
A, /P
H10
H8
H4
H2
H1
03
Days of the week
0
0
0
0
0
W4
W2
W1
04
Dates
0
0
D20
D10
D8
D4
D2
D1
07
Alarm 1: Seconds
A1M1
S40
S20
S10
S8
S4
S2
S1
08
Alarm 1: Minutes
A1M2
M40
M20
M10
M8
M4
M2
M1
09
Alarm 1: Hours
A1M3
12, /24
H20 or
A, /P
0,
D20
H10
H8
H4
H2
H1
0A
Alarm 1: Day, Date
A1M4
Day,
/Date
0,
D10
0,
D8
W4,
D4
W2,
D2
W1,
D1
0B
Alarm 2: Minutes
A2M2
M40
M20
M10
M8
M4
M2
M1
0C
Alarm 2: Hours
A2M3
12, /24
H20 or
A, /P
0,
D20
H10
H8
H4
H2
H1
0D
Alarm 2: Day, Date
A2M4
Day,
/Date
0,
D10
0,
D8
W4,
D4
W2,
D2
W1,
D1
0E
Control
/ETIME
0
0
RS2
RS1
INTCN
A2IE
A1IE
0F
Status
OSF
0
0
0
0
0
A2F
A1F
Note:
Alarm function does not support different hour system adopted in time and alarm register.
The PT7C4337 contains two time-of-day/date alarms. The alarms can be programmed (by the INTCN bit of the control register)
to operate in two different modes - each alarm can drive its own separate interrupt output or both alarms can drive a common
interrupt output. Bit 7 of each of the time-of-day/date alarm registers are mask bits.
When all of the mask bits for each alarm are logic 0, an alarm only occurs when the values in the timekeeping registers 00h ~ 04h
match the values stored in the time-of-day/date alarm registers. The alarms can also be programmed to repeat every second,
minute, hour, day, or date. Table 2 and Table 3 shows the possible settings.
The Day, /Date bits (bit 6 of the alarm day/date registers) control whether the alarm value stored in bits 0 ~ 5 of that register
reflects the day of the week or the date of the month. If the bit is written to logic 0, the alarm is the result of a match with date of
the month. If the bit is written to logic 1, the alarm is the result of a match with day of the week.
When the PT7C4337 register values match alarm register settings, the corresponding alarm flag (A1F or A2F) bit is set to logic 1.
If the corresponding alarm interrupt enable (A1IE or A2IE) is also set to logic 1, the alarm condition activates one of the interrupt
output (INTA or SQW/INTB) signals. The match is tested on the once-per-second update of the time and date registers.