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參數(shù)資料
| 型號： | PT7A8980 |
| 英文描述： | 100V Quad N-Channel HEXFET Power MOSFET in a Power MLP package |
| 中文描述： | 256端口無阻塞時隙開關？ |技術資料？（PDF格式） |
| 文件頁數(shù)： | 14/19頁 |
| 文件大?。?/td> | 220K |
| 代理商： | PT7A8980 |
14
PT0011(09/02)
Ver:3
Data Sheet
PT7A8980/8980L Digital Switch
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Figure 13. Timing Diagram of CSTo and Output Data Stream
Figure 12. Timing Diagram of Serial Input
Figure 11. Timing Diagram of Output Driver Enable
t
OED
t
OED
2.2V
0.8V
2.5V
0.4V
ODE
STo0
To
STo7
High
Impedance
Bit Cell Boundaries
C4i
STi0
to
STi7
2.2V
0.8V
2.2V
0.8V
t
SS
t
SH
C4i
F0i
Bit Cells
CSTo
CH31, Bit 0
CH0, Bit 7
CH0, Bit 6
CH0, Bit 5
JXG Bit 1, CH0, STo7 JXG Bit 1, CH1, STo0 JXG Bit 1, CH1, STo1 JXG Bit 1, CH1, STo2
* CH channel, JXG Connection Memory High Location
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