PSB 2115
PSF 2115
Table of Contents
Page
Semiconductor Group
6
11.97
3.6.3.2 TE/LT-T Modes Transition Criteria . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .196
3.6.4
State Machine LT-S Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .202
3.6.4.1 LT-S Mode State Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .202
3.6.4.2 LT-S Mode Transition Criteria . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .203
3.6.4.3 Transmitted Signals and Indications in LT-S Mode . . . . . . . . . . . . . . . . . . .204
3.6.4.4 States LT-S Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .205
3.6.5
State Machine Intelligent NT Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .206
3.6.5.1 Intelligent NT Mode State Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .206
3.6.5.2 Intelligent NT Mode Transition Criteria . . . . . . . . . . . . . . . . . . . . . . . . . . . . .207
3.6.5.3 Transmitted Signals and Indications in Intelligent NT Mode . . . . . . . . . . . .208
3.6.5.4 States Intelligent NT Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .209
3.6.6
Command/Indicate Channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .210
3.6.7
Example of Activation/Deactivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .212
4
Detailed Register Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .213
4.1
Register Address Arrangement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .213
4.2
4.2.1
4.2.2
4.2.3
4.2.4
4.2.5
4.2.6
4.2.7
4.2.8
4.2.9
4.2.10
4.2.11
4.2.12
4.2.13
4.2.14
4.2.15
4.2.16
4.2.17
4.2.18
4.2.19
4.2.20
4.2.21
4.2.22
4.2.23
B-Channel Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .218
RFIFOB - Receive FIFO B-Channel (Read)) . . . . . . . . . . . . . . . . . . . . . . . .218
XFIFOB - Transmit FIFO B-Channel (WRITE)) . . . . . . . . . . . . . . . . . . . . . .219
ISTAB - Interrupt Status Register for B-Channel (READ) . . . . . . . . . . . . . .220
MASKB - Mask Register for B-Channel (WRITE) . . . . . . . . . . . . . . . . . . . .220
STARB - Status Register for B-Channel (READ) . . . . . . . . . . . . . . . . . . . . .221
CMDRB - Command Register for B-Channel (WRITE) . . . . . . . . . . . . . . . .222
MODEB - Mode Register for B-Channel (READ/WRITE) . . . . . . . . . . . . . .223
EXIRB - Extended Interrupt Register for B-Channel (READ) . . . . . . . . . . . .225
RBCLB - Receive Byte Count Low for B-Channel (READ) . . . . . . . . . . . . .226
RAH1 - Receive Address Byte High Register 1 (WRITE) . . . . . . . . . . . . . .226
RAH2 - Receive Address Byte High Register 2 (WRITE) . . . . . . . . . . . . . .226
RSTAB - Receive Status Register for B-Channel (READ) . . . . . . . . . . . . . .227
RAL1 - Receive Address Byte Low Register 1 (READ/WRITE) . . . . . . . . . .229
RAL2 - Receive Address Byte Low Register 2 (WRITE) . . . . . . . . . . . . . . .229
RHCRB - Receive HDLC Control Register for B-Channel (READ) . . . . . . .230
XBCL - Transmit Byte Count Low (WRITE) . . . . . . . . . . . . . . . . . . . . . . . . .230
CCR2 - Channel Configuration Register 2 (READ/WRITE) . . . . . . . . . . . . .231
RBCHB - Received Byte Count High for B-Channel (READ) . . . . . . . . . . . .232
XBCH - Transmit Byte Count High (WRITE) . . . . . . . . . . . . . . . . . . . . . . . .232
RLCR - Receive Length Check Register (WRITE) . . . . . . . . . . . . . . . . . . . .233
CCR1 - Channel Configuration Register 1 (READ/WRITE) . . . . . . . . . . . . .234
TSAX - Time-Slot Assignment Register Transmit (WRITE) . . . . . . . . . . . . .234
TSAR - Time-Slot Assignment Register Receive (WRITE) . . . . . . . . . . . . .235