參數(shù)資料
型號(hào)： PSD935F3V-15B81
廠商： 意法半導(dǎo)體
英文描述： Configurable Memory System on a Chip for 8-Bit Microcontrollers
中文描述： 在8片位微控制器可配置存儲(chǔ)系統(tǒng)
文件頁(yè)數(shù)： 17/91頁(yè)
文件大小： 488K
代理商： PSD935F3V-15B81
PSD9XX Family
PSD935G2
16
9.1.1.2 Upper and Lower Block IN MAIN FLASH SECTOR
The PSD935G2’s main Flash has eight 64K bytes sector. The 64K byte sector size may
cause some difficulty in code mapping for an 8-bit MCU with only 64K byte address space.
To resolve this mapping issue, the PSD935G2 provides additional logic (Figure 3) for the
user to split the 8 sectors such that each sector has a lower and upper 32K byte block, and
the two blocks can reside in different pages but in the same address range.
If your design works with 64KB sectors, you don’t need to configure this logic. If the design
requires 32KB blocks in each sector, you need to define a “FA15” PLD equation in
PSDsoft as the A15 address input to the main Flash module. FA15 consists of 3 product
terms and will control whether the MCU is accessing the lower or upper 32KB in the
selected sector. Below is an example for Flash sector chip select FS0. A typical equation
is FA15 = pgr4 of the Page Register. When pgr4 is 0 (page 00), the lower 32KB is
selected. When Pgr4 is switched to 1 by the user, the upper 32KB is selected. PSDsoft will
automatically generate the PLD equations shown, based on your point and click
selections.
page = [pgr7...pgr0]; “Page Register output
“Sector Chip Select Equation
FS0 = ((0000h <= address <= 7FFFh) & page = 00h) #
((0000h <= address <= 7FFFh) & page = 10h);
FA15 = pgr4;
“as address A15 input to the main Flash
“select first 32KB block
“select second 32KB block
If no FA15 equation is defined in PSDsoft, the A15 that comes from the MCU address bus
will be routed as input to the main Flash instead of FA15. The FA15 equation has no
impact in the Sector Erase operation. Note: FA15 affects all eight sectors of the main Flash
simultaneously, you cannot direct FA15 to a particular Flash sector only.
9.1.1.3 The Ready/Busy Pin (PE4)
Pin PE4 can be used to output the Ready/Busy status of the PSD935G2. The output on
the pin will be a ‘0’ (Busy) when Flash memory blocks are being written to,
or
when the
Flash memory block is being erased. The output will be a ‘1’ (Ready) when no write or
erase operation is in progress.
The
PSD935G2
Functional
Blocks
(cont.)
DPLD
ARRAY
FA15
A15
*
Set by PSDsoft
FLASH CHIP SELECTS FS0-7
MUX
NVM CONTROL BIT
*
MAIN
FLASH
SECTOR
ADDR A15
A [14:0]
Figure 3. Selecting the Upper or Lower Block in a Main Flash Sector
相關(guān)PDF資料
PDF描述
PSD935F3V-15B81I Ceramic Chip Capacitors / MIL-PRF-55681; Capacitance [nom]: 30000uF; Working Voltage (Vdc)[max]: 100V; Capacitance Tolerance: +/-0.1pF; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 0805; Termination: Solder Coated (Sn/Pb, 70/30); Body Dimensions: 0.080&quot; x 0.050&quot; x 0.055&quot;; Container: Bag; Features: MIL-PRF-55681: S Failure Rate
PSD935F3V-15J Configurable Memory System on a Chip for 8-Bit Microcontrollers
PSD935F3V-15JI Configurable Memory System on a Chip for 8-Bit Microcontrollers
PSD935F3V-15M Configurable Memory System on a Chip for 8-Bit Microcontrollers
PSD935F3V-15MI Configurable Memory System on a Chip for 8-Bit Microcontrollers
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