參數(shù)資料
型號(hào): PSD813FH
英文描述: Field Programmble Microcontroller Peripherals With Flash Memory(帶閃存的現(xiàn)場可編程微控制器)
中文描述: 場可編程微控制器外圍設(shè)備與快閃記憶體(帶閃存的現(xiàn)場可編程微控制器)
文件頁數(shù): 34/83頁
文件大?。?/td> 369K
代理商: PSD813FH
PSD813FN/FH
Prelimnary
34
I/OPorts
(cont.)
Port Data Registers
The Port Data Registers, shown in Table 21, are used by the microcontroller to write or
read data to or from the ports. Table 21 shows the register name, the ports having
each register type and microcontroller access for each register. The registers are described
below.
Register Name
Port
MCUAccess
Data In
A,B,C,D
Read – the input on pin
Data Out
A,B,C,D
Write/Read Feedback
Output Micro
Cell
A,B,C
Read – outputs of Micro
Cells
Write – loading Micro
Cells Flip-Flop
Read – outputs of the Input Micro
Cells
Input Micro
Cell
A,B,C
Enable Out
A,B,C
Read – the output enable control of the port driver
Table 21. Port Data Registers
Data In
Port pins are connected directly to the Data In buffer. In MCU I/O input mode, the pin input
is read through the Data In buffer. The MCU can always read the state of a Port pin using
this method, regardless of what is driving the pin.
Data Out Register
Stores output data written by the MCU in the MCU I/O output mode. The contents of the
Register are driven out to the pins if the Direction Register or the .oe product term is set to
“1”. The contents of the register can also be read back by the microcontroller.
Output Micro
Cell
The GPLD Output Micro
Cells occupy a location in the microcontroller’s address
space. The microcontroller can read the output of the Micro
Cells. Writing to the
Micro
Cell loads data to the Micro
Cell Flip-Flops. Refer to the PLD section for more
detail.
Input Micro
Cell
The Input Micro
Cells can be used to latch or store external inputs. The outputs of
the Input Micro
Cells are routed to the PLD input bus and also can be read by the
microcontroller. Refer to the PLD section for detail description.
Enable Out
The Enable Out buffer allows the microcontroller to read the outputs of the “OR” gate that
is the enable input to the port output driver. A “1” indicates the driver is in output mode, a “0”
indicates the driver is in tri-state and the pin is in input mode.
相關(guān)PDF資料
PDF描述
PSD82 Three Phase Rectifier Bridges
PSD834F2V Flash PSD, 3.3V Supply, for 8-bit MCUs 2 Mbit + 256 Kbit Dual Flash Memories and 64 Kbit SRAM(2M位+256K位雙路閃速存儲(chǔ)器和64K位靜態(tài)RAM,閃速PSD,3.3V電源,用于8位MCU.)
PSD834F2 Flash In-System Programmable (ISP) Peripherals For 8-bit MCUs(用于8位MCUs的閃速ISP外圍)
PSD835G2 Configurable Memory System on a Chip for 8-Bit Microcontrollers(8位微控制器片上存儲(chǔ)器可編程外設(shè))
PSD835G2 100V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a TO-254AA Tabless package; Similar to IRHMJ57160 with optional Total Dose Rating of 1000kRads
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PSD813FH-15J 制造商:WSI 功能描述:
PSD813FH-90J 制造商:WSI 功能描述:
PSD813FN-15J 制造商:WSI 功能描述:
PSD833F2-90J 功能描述:CPLD - 復(fù)雜可編程邏輯器件 5.0V 1M 90ns RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
PSD833F2-90JI 功能描述:SPLD - 簡單可編程邏輯器件 5.0V 1M 90ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24