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參數(shù)資料
| 型號： | PSD512B1 |
| 英文描述： | Field Programmable Microcontroller Peripherals(可編程邏輯，16K位SRAM,40個可編程I/O,通用PLD有61個輸入) |
| 中文描述： | 現(xiàn)場可編程微控制器外圍設(shè)備（可編程邏輯，16K的位的SRAM，40余個可編程輸入/輸出，通用PLD的有61個輸入） |
| 文件頁數(shù)： | 22/25頁 |
| 文件大?。?/td> | 186K |
| 代理商： | PSD512B1 |
4-318
PSD5XX – Application Note 042
Software
Configuration
of the PSD503
Figure 15 shows a block diagram of the steps needed to configure the registers of the
PSD503 for this application. Figure 16 shows a sample software program written in C that is
used in this application to configure the PSD503. This software programs the special
function register of Port A to be used as the timer outputs. Figure 17 shows the PSDSOFT
configuration of the timers. The PSD503 must be configured through PSDSOFT for the
BUS type, WR, RD, INTR and PORT operation.
The timer clock frequency is configured through the DLCY register to 1MHz. As the step
rate increases the step rate accuracy deteriorates due to the quantization effect. The
quantization effect is not a problem in this application. The output pulse width of each timer
is one microsecond which is sufficient for this application.
Counter / Timer 0:
Waveform/Pulse Mode.
Counter / Timer 1:
Pulse Output.
Counter / Timer 2:
Waveform/PulseMode.
Counter / Timer 3:
Pulse Output
Do you need Automatic Power Down Clock Input
NO
Do you want to set the security bit
NO
Do you need the Intr output signal
YES
Figure 17. PSDsoft Configuration of the Timers
Conclusion
In this application the PSD503 provided a very useful integrated means of design. The
following were benefited from this design:
64 K x 16 EPROM
Eighteen bits of latched output for demultiplexing ADDRESS from DATA.
An 8-bit Interrupt Controller Equivalent to an 8259.
Four 16-bit preloadable timers with a prescaler for the timer clocks.
Logic for decoding.
Programmable external PORTS.
The board space reduction and the amount of noise reduction that resulted from this design
is immeasurable.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PSD513B1 | Field Programmable Microcontroller Peripherals(可編程邏輯，16K位SRAM,40個可編程I/O,通用PLD有61個輸入) |
| PSD611E1 | Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯，4K位SRAM,26個可編程I/O,通用PLD有63個輸入) |
| PSD601E1 | Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯，4K位SRAM,26個可編程I/O,通用PLD有63個輸入) |
| PSD602E1 | Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯，4K位SRAM,26個可編程I/O,通用PLD有63個輸入) |
| PSD603E1 | Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯，4K位SRAM,26個可編程I/O,通用PLD有63個輸入) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PSD512B1-12J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD512B1-12JI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD512B1-12LI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD512B1-12U | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD512B1-12UI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
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