參數(shù)資料
型號: PSD503B1-C-90JI
廠商: 意法半導(dǎo)體
英文描述: Low Cost Field Programmable Microcontroller Peripherals
中文描述: 低成本現(xiàn)場可編程微控制器外圍設(shè)備
文件頁數(shù): 121/153頁
文件大小: 1036K
代理商: PSD503B1-C-90JI
PSD5XX Famly
118
Microcontroller Interface – AC/DC Parameters
(5 V ± 10% Versions)
-70
-90**
-15
ZPLD_TURBO
OFF
*
Symbol
Parameter
Conditions
Min Max
Min Max
Min Max
Unit
t
LVDV
ALE Access Time from
Power Down
100
120
150
Add 10
ns
t
LVDV1
ALE or CSI Access Time
from Sleep
120
150
200
0
ns
t
LVDV2
ZPLD Propagation Delay
in Sleep Mode
600
600
600
0
ns
t
LVDV3
ZPLD Recovery Time
after Sleep Mode
250
250
250
0
ns
t
CHCL
APD Clock High Time
Using PE7
10
12
15
0
ns
t
CLCH
APD Clock Low Time
Using PE7
10
12
15
0
ns
f
MAX
APD Maximum Frequency
Using PE7
35.00
30.00
22.00
0
MHz
t
1
RESET Active Low Time
150
200
300
0
ns
t
2
RESET High to
Operational Device
150
200
300
0
ns
Power Down and Reset Timng
(5 V ± 10%)
*
*
If ZPLD_TURBO is off and the ZPLD is operating above 15 MHz, there is no need to add 10 ns to the timing parameters.
**
The -90 speed is available only on Industrial Temperature Range product.
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