參數(shù)資料
型號(hào): PSD4235G2-A-20UI
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 4M X 1 FLASH, 52 I/O, PIA-GENERAL PURPOSE, PQFP80
封裝: PLASTIC, TQFP-80
文件頁數(shù): 13/104頁
文件大?。?/td> 1114K
代理商: PSD4235G2-A-20UI
Obsolete
Product(s)
- Obsolete
Product(s)
Pin description
PSD4135G2, PSD4135G2V
Doc ID 7838 Rev 2
PD2
1
I/O
CMOS
or
Open
Drain
PD2 pin of Port D. This port pin can be configured to have the following functions:
1. MCU I/O - standard output or input port.
2. Transparent PLD input (can also be PLD input for address A16 and above).
3. PSD Chip Select input (CSI). When low, the MCU can access the PSD memory
and I/O. When high, the PSD memory blocks are disabled to conserve power. The
falling edge of this signal can be used to get the device out of Power-down mode.
PD3
2
I/O
CMOS
or
Open
Drain
PD3 pin of Port D. This port pin can be configured to have the following functions:
1. MCU I/O - standard output or input port.
2. Transparent PLD input (can also be PLD input for address A16 and above).
3. WRH - for 16-bit data bus, WRITE to high byte, active low.
PE0
71
I/O
CMOS
or
Open
Drain
PE0 pin of Port E. This port pin can be configured to have the following functions:
1. MCU I/O - standard output or input port.
2. Latched address output.
3. TMS input for the JTAG Serial Interface.
PE1
72
I/O
CMOS
or
Open
Drain
PE1 pin of Port E. This port pin can be configured to have the following functions:
1. MCU I/O - standard output or input port.
2. Latched address output.
3. TCK input for the JTAG Serial Interface.
PE2
73
I/O
CMOS
or
Open
Drain
PE2 pin of Port E. This port pin can be configured to have the following functions:
1. MCU I/O - standard output or input port.
2. Latched address output.
3. TDI input for the JTAG Serial Interface.
PE3
74
I/O
CMOS
or
Open
Drain
PE3 pin of Port E. This port pin can be configured to have the following functions:
1. MCU I/O - standard output or input port.
2. Latched address output.
3. TDO output for the JTAG Serial Interface.
PE4
75
I/O
CMOS
or
Open
Drain
PE4 pin of Port E. This port pin can be configured to have the following functions:
1. MCU I/O - standard output or input port.
2. Latched address output.
3. TSTAT output for the JTAG Serial Interface.
4. Ready/Busy output for parallel in-system programming (ISP).
PE5
76
I/O
CMOS
or
Open
Drain
PE5 pin of Port E. This port pin can be configured to have the following functions:
1. MCU I/O - standard output or input port.
2. Latched address output.
3. TERR active low output for the JTAG Serial Interface.
PE6
77
I/O
CMOS
or
Open
Drain
PE6 pin of Port E. This port pin can be configured to have the following functions:
1. MCU I/O - standard output or input port.
2. Latched address output.
Table 2.
Pin description (continued)
Pin name
Pin
Type
Description
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