參數(shù)資料
型號(hào): PSD4235G2-A-20UI
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 4M X 1 FLASH, 52 I/O, PIA-GENERAL PURPOSE, PQFP80
封裝: PLASTIC, TQFP-80
文件頁(yè)數(shù): 36/104頁(yè)
文件大?。?/td> 1114K
代理商: PSD4235G2-A-20UI
Obsolete
Product(s)
- Obsolete
Product(s)
PSD4135G2, PSD4135G2V
Memory blocks delailed operation
Doc ID 7838 Rev 2
It is suggested (as with all Flash memories) to read the location again after the embedded
programming algorithm has completed to compare the word that was written to Flash with
the word that was intended to be written.
When using the Data Polling method after an erase instruction, Figure 6 still applies.
However, DQ7 (DQ15) will be ‘0’ until the erase operation is complete. A ‘1’ on DQ5 (DQ13)
will indicate a timeout failure of the erase operation, a ‘0’ indicates no error.
The MCU can read any location within the sector being erased to get DQ7 (DQ15) and DQ5
(DQ13) .
PSDsoft generates ANSI C code functions which implement these Data Polling algorithms.
Figure 6.
Data polling flowchart
READ DQ5 and DQ7
(DQ13 and DQ15)
at Valid Even Address
START
READ DQ7
(DQ15)
Program
or Erase
Cycle failed
Program
or Erase
Cycle is
complete
AI04920
Yes
No
Yes
No
DQ5
(DQ13)
= 1
DQ7
(DQ15)
=
Data7
(Data15)
Yes
No
Issue RESET
instruction
DQ7
(DQ15)
=
Data7
(Data15)
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