參數(shù)資料
型號(hào)： PSD4135F3-B-20MI
廠商： 意法半導(dǎo)體
英文描述： Flash In-System-Programmable Peripherals for 16-Bit MCUs
中文描述： Flash在系統(tǒng)可編程外設(shè)的16位微控制器
文件頁(yè)數(shù)： 31/93頁(yè)
文件大?。?/td> 503K
代理商： PSD4135F3-B-20MI
The
PSD4000
Functional
Blocks
(cont.)
MAIN
FLASH
DPLD
FLASH
BOOT
BLOCK
SRAM
RS0
CSBOOT0-3
FS0-7
CS
CS
CS
OE
OE
RD
PSEN
OE
Figure 6. 80C51XA Memory Modes – Separate Space Mode
MAIN
FLASH
DPLD
FLASH
BOOT
BLOCK
SRAM
RS0
CSBOOT0-3
FS0-7
RD
CS
CS
CS
RD
OE
OE
VM REG BIT 2
PSEN
VM REG BIT 0
VM REG BIT 1
VM REG BIT 3
VM REG BIT 4
OE
Figure 7. 80C51XA Memory Mode – Combined Space Mode
9.1.3.2 Configuration Modes for MCUs with Separate Program and Data Spaces
9.1.3.2.1 Separate Space Modes
Code memory space is separated from data memory space. For example, the PSEN
signal is used to access the program code from the main Flash Memory, while the RD
signal is used to access data from the secondary Flash memory, SRAM and I/O Ports.
This configuration requires the VM register to be set to 0Ch.
9.1.3.2.2 . Combined Space Modes
The program and data memory spaces are combined into one space that allows the main
Flash Memory, secondary Flash memory, and SRAM to be accessed by either PSEN or
RD. For example, to configure the main Flash memory in combined space mode, bits 2
and 4 of the VM register are set to
“
1
”
.
9.1.3.3 80C51XA Memory Map Example
See Application Notes for examples.
PSD4000 Series
Preliminary Information
28
相關(guān)PDF資料
PDF描述
PSD4135F3-B-20U Ceramic Chip Capacitors / Standard C0G; Capacitance [nom]: 4700pF; Working Voltage (Vdc)[max]: 100V; Capacitance Tolerance: +/-10%; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 1210; Termination: Tin Plated Nickel Barrier; Body Dimensions: 0.126" x 0.098"; Container: Bulk; Features: Unmarked
PSD4135F3-B-20UI Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4135F3-B-70B81 CAP 4700PF 100V 10% NP0(C0G) SMD-1210 TR-7-PL SN-NIBAR
PSD4135F3-B-70B81I Ceramic Chip Capacitors / Standard C0G; Capacitance [nom]: 4700pF; Working Voltage (Vdc)[max]: 50V; Capacitance Tolerance: +/-10%; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 1210; Termination: Tin Plated Nickel Barrier; Body Dimensions: 0.126" x 0.098"; Container: Bulk; Features: Unmarked
PSD4135F3-B-70J Flash In-System-Programmable Peripherals for 16-Bit MCUs
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PSD4135F3-B-20U 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4135F3-B-20UI 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4135F3-B-70B81 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4135F3-B-70B81I 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4135F3-B-70J 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System-Programmable Peripherals for 16-Bit MCUs
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