型號 | 廠商 | 描述 |
psd4135f2v-c-20u 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f2v-c-20ui 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f2v-c-70b81 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f2v-c-70b81i 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Ceramic Chip Capacitors / Standard C0G; Capacitance [nom]: 3300pF; Working Voltage (Vdc)[max]: 50V; Capacitance Tolerance: +/-1%; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 1210; Termination: Tin Plated Nickel Barrier; Body Dimensions: 0.126" x 0.098"; Container: Bulk; Features: Unmarked |
psd4135f2v-c-70j 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f2v-c-70ji 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f2v-c-70m 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f2v-c-70mi 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f2v-c-70u 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f2v-c-70ui 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f2v-c-90b81 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f2v-c-90b81i 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-a-12ui 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-a-15b81i 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Ceramic Chip Capacitors / Standard C0G; Capacitance [nom]: 3900pF; Working Voltage (Vdc)[max]: 50V; Capacitance Tolerance: +/-1%; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 1210; Termination: Tin Plated Nickel Barrier; Body Dimensions: 0.126" x 0.098"; Container: Bulk; Features: Unmarked |
psd4135f3-a-15j 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-a-15ji 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-a-15m 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-a-15mi 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-a-15u 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-a-15ui 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-a-20b81 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-a-20b81i 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-a-20j 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | CAP 3900PF 50V 5% NP0(C0G) SMD-1210 TR-7-PL SN-NIBAR |
psd4135f3-a-20ji 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-a-20m 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-a-20mi 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-a-20u 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-a-20ui 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-a-70b81i 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-a-70j 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-a-70ji 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-a-70m 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-b-15m 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-b-15mi 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-b-15u 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Ceramic Chip Capacitors / Standard C0G; Capacitance [nom]: 4700pF; Working Voltage (Vdc)[max]: 100V; Capacitance Tolerance: +/-5%; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 1210; Termination: Tin Plated Nickel Barrier; Body Dimensions: 0.126" x 0.098"; Container: Bulk; Features: Unmarked |
psd4135f3-b-15ui 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-b-20b81 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-b-20b81i 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-b-20j 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Ceramic Chip Capacitors / Standard C0G; Capacitance [nom]: 4700pF; Working Voltage (Vdc)[max]: 50V; Capacitance Tolerance: +/-5%; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 1210; Termination: Tin Plated Nickel Barrier; Body Dimensions: 0.126" x 0.098"; Container: Bulk; Features: Unmarked |
psd4135f3-b-20ji 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-b-20m 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-b-20mi 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-b-20u 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Ceramic Chip Capacitors / Standard C0G; Capacitance [nom]: 4700pF; Working Voltage (Vdc)[max]: 100V; Capacitance Tolerance: +/-10%; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 1210; Termination: Tin Plated Nickel Barrier; Body Dimensions: 0.126" x 0.098"; Container: Bulk; Features: Unmarked |
psd4135f3-b-20ui 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-b-70b81 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | CAP 4700PF 100V 10% NP0(C0G) SMD-1210 TR-7-PL SN-NIBAR |
psd4135f3-b-70b81i 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Ceramic Chip Capacitors / Standard C0G; Capacitance [nom]: 4700pF; Working Voltage (Vdc)[max]: 50V; Capacitance Tolerance: +/-10%; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 1210; Termination: Tin Plated Nickel Barrier; Body Dimensions: 0.126" x 0.098"; Container: Bulk; Features: Unmarked |
psd4135f3-b-70j 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-b-70ji 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-b-70m 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-b-70mi 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導體 | Ceramic Chip Capacitors / Standard C0G; Capacitance [nom]: 0.047uF; Working Voltage (Vdc)[max]: 25V; Capacitance Tolerance: +/-5%; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 1210; Termination: Tin Plated Nickel Barrier; Body Dimensions: 0.126" x 0.098"; Container: Bulk; Features: Unmarked |