型號 | 廠商 | 描述 |
psd4135f3-b-70u 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-b-70ui 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-c-15ui 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-c-20b81 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | CAP 5600PF 50V 10% NP0(C0G) SMD-1210 TR-7-PL SN-NIBAR |
psd4135f3-c-20b81i 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-c-20j 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-c-20ji 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-c-20m 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-c-20mi 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-c-20u 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-c-20ui 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-c-70b81 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-c-70b81i 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-c-70j 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-c-70ji 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-c-70m 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Ceramic Chip Capacitors / Standard C0G; Capacitance [nom]: 680pF; Working Voltage (Vdc)[max]: 200V; Capacitance Tolerance: +/-20%; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 1210; Termination: Tin Plated Nickel Barrier; Body Dimensions: 0.126" x 0.098"; Container: Bulk; Features: Unmarked |
psd4135f3-c-70mi 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-c-70u 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-c-70ui 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-c-90b81 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-c-90b81i 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3-c-90j 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | CAP,Ceramic,6.8nF,50VDC,1-% Tol,1+% Tol,C0G-TC Code,-30,30ppm-TC RoHS Compliant: Yes |
psd4135f3v-a-90ui 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3v-b-12b81i 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3v-b-12j 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3v-b-12ji 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | CAP 4700PF 50V 5% NP0(C0G) SMD-1808 TR-7-PL SN-NIBAR |
psd4135f3v-b-70b81 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3v-b-70b81i 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Ceramic Chip Capacitors / Standard C0G; Capacitance [nom]: 1000pF; Working Voltage (Vdc)[max]: 50V; Capacitance Tolerance: +/-10%; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 1812; Termination: Tin Plated Nickel Barrier; Body Dimensions: 0.177" x 0.126"; Container: Bulk; Features: Unmarked |
psd4135f3v-b-70j 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3v-b-70ji 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Ceramic Chip Capacitors / Standard C0G; Capacitance [nom]: 0.01uF; Working Voltage (Vdc)[max]: 100V; Capacitance Tolerance: +/-1%; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 1812; Termination: Tin Plated Nickel Barrier; Body Dimensions: 0.177" x 0.126"; Container: Bulk; Features: Unmarked |
psd4135f3v-b-70m 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3v-b-70mi 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Ceramic Chip Capacitors / Standard C0G; Capacitance [nom]: 0.01uF; Working Voltage (Vdc)[max]: 50V; Capacitance Tolerance: +/-1%; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 1812; Termination: Tin Plated Nickel Barrier; Body Dimensions: 0.177" x 0.126"; Container: Bulk; Features: Unmarked |
psd4135f3v-b-70u 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3v-b-70ui 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3v-b-90b81 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3v-b-90b81i 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Ceramic Chip Capacitors / Standard C0G; Capacitance [nom]: 0.01uF; Working Voltage (Vdc)[max]: 100V; Capacitance Tolerance: +/-2%; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 1812; Termination: Tin Plated Nickel Barrier; Body Dimensions: 0.177" x 0.126"; Container: Bulk; Features: Unmarked |
psd4135f3v-b-90j 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3v-b-90ji 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Ceramic Chip Capacitors / Standard C0G; Capacitance [nom]: 0.01uF; Working Voltage (Vdc)[max]: 50V; Capacitance Tolerance: +/-2%; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 1812; Termination: Tin Plated Nickel Barrier; Body Dimensions: 0.177" x 0.126"; Container: Bulk; Features: Unmarked |
psd4135f3v-b-90m 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3v-b-90mi 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | CAP 0.01UF 50V 2% NP0(C0G) SMD-1812 TR-7-PL SN-NIBAR |
psd4135f3v-b-90u 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Ceramic Chip Capacitors / Standard C0G; Capacitance [nom]: 0.01uF; Working Voltage (Vdc)[max]: 100V; Capacitance Tolerance: +/-5%; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 1812; Termination: Tin Plated Nickel Barrier; Body Dimensions: 0.177" x 0.126"; Container: Bulk; Features: Unmarked |
psd4135f3v-b-90ui 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3v-c-12b81i 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3v-c-12j 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Ceramic Chip Capacitors / Standard C0G; Capacitance [nom]: 0.01uF; Working Voltage (Vdc)[max]: 50V; Capacitance Tolerance: +/-5%; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 1812; Termination: Tin Plated Nickel Barrier; Body Dimensions: 0.177" x 0.126"; Container: Bulk; Features: Unmarked |
psd4135f3v-c-12ji 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3v-c-12m 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3v-c-70b81i 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3v-c-70j 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3v-c-70ji 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
psd4135f3v-c-70m 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 |
意法半導(dǎo)體 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |