參數(shù)資料
型號: PSD302
英文描述: Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個可編程I/O,通用PLD有16個輸入)
中文描述: 現(xiàn)場可編程微控制器外圍設備(可編程邏輯,16K的位的SRAM,19余個可編程輸入/輸出,通用PLD的有16個輸入)
文件頁數(shù): 96/127頁
文件大?。?/td> 682K
代理商: PSD302
2-97
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Single Chip Programmable Peripheral for Microcontroller-based Applications
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3.0 to 5.5 Volt Operation
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19 Individually Configurable I/O pins that can be used as:
— Microcontroller I/O port expansion
— Programmable Address Decoder (PAD) I/O
— Latched address output
— Open drain or CMOS
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Two Programmable Arrays (PAD A and PAD B)
— Total of 40 Product Terms and up to 12 Inputs and 24 Outputs
— Address Decoding up to 1 MB
— Logic replacement
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“No Glue” Microcontroller Chip-Set
— Built-in address latches for multiplexed address/data bus
— Non-multiplexed address/data bus mode
— Selectable 8 or 16 bit data bus width
— ALE polarity programmable
— Selectable modes for read and write control bus as RD/WR or R/W/E
— BHE pin for byte select in 16-bit mode
— PSEN pin for 8051 users
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256 Kbits of UV EPROM
— Configurable as 32K x 8 or as 16K x 16
— Divides into 8 equal mappable blocks for optimized mapping
— Block resolution is 4K x 8 or 2K x 16
— 150 ns EPROM access time, including input latches and PAD address decoding.
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16 Kbit Static RAM
— Configurable as 2K x 8 or as 1K x 16
— 150 ns SRAM access time, including
input latches and PAD address
decoding
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Address/Data Track Mode
— Enables easy Interface to Shared Resources (e.g., Mail Box SRAM) with
other Microcontrollers or a Host Processor
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Built-In Security
— Locks the PSD301L and PAD Decoding Configuration
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Available in a Choice of Packages
— 44 Pin PLDCC, CLDCC and TQFP
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Simple Menu-Driven Software:
Configure the PSD301L on an IBM PC
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Pin Compatible with the PSD3XX and PSD3XXL Series
Key Features
Programmable Peripheral
PSD301L
3-Volt Single-Chip Microcontroller Peripheral
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相關代理商/技術(shù)參數(shù)
參數(shù)描述
PSD302-12J 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
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