參數(shù)資料
型號: PSD302
英文描述: Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個(gè)可編程I/O,通用PLD有16個(gè)輸入)
中文描述: 現(xiàn)場可編程微控制器外圍設(shè)備(可編程邏輯,16K的位的SRAM,19余個(gè)可編程輸入/輸出,通用PLD的有16個(gè)輸入)
文件頁數(shù): 39/127頁
文件大?。?/td> 682K
代理商: PSD302
-15
-20
-25
-30
CMiser
= 1
Add:
Symbol
Parameter
Min Max Min Max Min Max Min Max
Unit
T1
ALE or AS Pulse Width
40
50
75
80
ns
T2
Address Set-up Time
12
15
30
35
ns
T3
Address Hold Time
10
15
20
30
0
ns
Leading Edge of Read
to Data Active
T4
0
0
0
0
0
ns
T5
ALE Valid to Data Valid
160
200
250
300
20
ns
T6
Address Valid to Data Valid
150
200
250
300
20
ns
T7
CSI Active to Data Valid
160
210
275
325
20
ns
T8
Leading Edge of Read
to Data Valid
40
45
90
95
0
ns
T8A
Leading Edge of Read
to Data Valid
60
65
90
95
0
ns
T9
Read Data Hold Time
0
0
0
0
0
ns
T10
Trailing Edge of Read
to Data High-Z
40
45
55
60
0
ns
Trailing Edge of ALE or AS
to Leading Edge of Write
T11
0
0
40
45
ns
T12
RD, E, PSEN, DS Pulse Width
60
75
100
110
0
ns
T12A
WR Pulse Width
35
45
90
95
0
ns
Trailing Edge of Write or Read
to Leading Edge of ALE or AS
T13
5
5
5
5
0
ns
Address Valid to Trailing
Edge of Write
T14
150
200
250
300
0
ns
CSI Active to Trailing Edge
of Write
T15
160
200
275
325
0
ns
T16
Write Data Set-up Time
30
40
60
65
0
ns
T17
Write Data Hold Time
10
12
25
30
0
ns
T18
Port to Data Out Valid
Propagation Delay
40
45
70
75
0
ns
T19
Port Input Hold Time
0
0
0
0
0
ns
T20
Trailing Edge of Write to Port
Output Valid
50
60
100
110
0
ns
T21
ADi or Control to CSOi Valid
6
45
5
50
6
80
5
85
0
ns
T22
ADi or Control to CSOi Invalid
4
45
4
50
4
80
4
85
0
ns
AC Characteristics – PSD3XXL Low-Power Versions (3.3V ±10%, Note 43)
PSD3XX Famly
2-39
NOTE:
43. These AC Characteristics are for V
CC
= 3.0 – 3.6V.
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