參數(shù)資料
型號: PSD301L
英文描述: Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個可編程I/O,通用PLD有12個輸入)
中文描述: 現(xiàn)場可編程微控制器外圍設(shè)備(可編程邏輯,16K的位的SRAM,19余個可編程輸入/輸出,通用PLD的有12個輸入)
文件頁數(shù): 3/23頁
文件大?。?/td> 118K
代理商: PSD301L
Flash Memory – Application Note 048
3-21
Using SRAM for Executing
Programming Algorithms
Using the PSDXXX for Executing
Programming Algorithms and
Integrating Other Support Logic
Need to program Flash Memory the first
time on a PROM Programmer.
Program one PSD device vs.
programming Flash Memory and PLDs
on PROM Programmer. Blank Flash
Memory can be assembled on board.
Requires MCU to down load the
programming algorithms from Flash Memory
to SRAM and execute from SRAM to
program the Flash Memory. The MCU must
execute code from a memory device
while down loading the programming
algorithms to SRAM
Execute programming algorithm from
PSD’s internal EPROM. There is no
requirement to down load the
programming algorithm to SRAM
Must re-map the SRAM from Data Space
to Code Space to execute the
Programming Algorithms. May require
additional PLD Logic (when using
an 80C31).
No need to reconfigure SRAM.
Need PLD Logic for changing the
memory map to access Flash Memory
in both Program and Data Space
(when using an 80C31).
Required PLD Logic is built into the
PSD device.
Need PLD Logic for Address Decoding.
Built-in PLD Logic for Address Decoding.
Need PLD Logic for Paging (if exceeding
addressing capability of MCU).
Built-in Page Register.
Need Address Latch (for multiplexed MCUs).
Integrates Address Latch.
Boot block in Flash Memory is at risk of
being corrupted.
EPROM based boot block cannot be
corrupted.
Longer development time. More complex
design for defining Address Map and PLD
PLD Logic functions to handle both
Flash Memory and SRAM in different modes
of Operation.
Partitioned design (MCU+PSD+Flash),
easy to develop and debug. One PSD
device integrates all logic functions and
Boot EPROM. Simple Abel design entry
for defining memory map and PLD logic.
The PSD device is reprogrammable.
Larger size PCB required.
Integrated solution requiring smaller
PCB and less traces. ZPSD device is a
lower overall power solution with higher
reliability.
Table 1. Programming Flash Memory
System
Programming
Issues
(cont.)
相關(guān)PDF資料
PDF描述
PSD302R Field Programmable Microcontroller Peripherals(可編程邏輯,無SRAM,19個可編程I/O,通用PLD有16個輸入)
PSD303L Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個可編程I/O,通用PLD有16個輸入)
PSD303 Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個可編程I/O,通用PLD有16個輸入)
PSD311L Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個可編程I/O,通用PLD有12個輸入)
PSD311 Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個可編程I/O,通用PLD有12個輸入)
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