參數(shù)資料
型號(hào)： PSD301L
英文描述： Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個(gè)可編程I/O,通用PLD有12個(gè)輸入)
中文描述： 現(xiàn)場(chǎng)可編程微控制器外圍設(shè)備（可編程邏輯，16K的位的SRAM，19余個(gè)可編程輸入/輸出，通用PLD的有12個(gè)輸入）
文件頁(yè)數(shù)： 10/23頁(yè)
文件大?。?/td> 118K
代理商： PSD301L
3-28
Flash Memory – Application Note 048
“************************************* Port C pin declaration *************************************
“Port C pins (PC0-2) pin can be configured as:
“
1.Address input (a0-a9), which can be latched by ALE. Input is considered as
“
address input if it is included in the es0–7 equations.
“
2.Logic input to PAD. A logic input participates in PAD output equations only.
“
3.PAD output (chip select output). You need to write a logic equation for each of the
“
PAD outputs in the .abl file.
“Replace the reserved port pin name with your own signal name
“The following two signals are from the 80C31 I/O ports. These signals indicate what
“ page of memory is being accessed. This is needed to address the full range
“of the 1Mbit Flash Memory.
MCU_pgr0
pin 40; “Port C pin pc0
MCU_pgr1
pin 41; “Port C pin pc1
“Connect the external psen signal to PC2. This will route the psen into PAD B
“for external chip selects.
ext_psen
pin 42; “Port C pin pc2
“*********************************** A19/CSI pin declaration ***********************************
“The A19/CSI pin can be configured as A19 (address or logic) input or as CSI
“(power down). Select the CSI function in the PSD Configuration. Declare A19 here if it is
“configured as an address or logic input to the PAD.
“Replace the reserved port pin name with your own signal name.
“Delete the next line if CSI function is selected.
“This is a signal from the 80C31 I/O Port indicating, when high, that the
“Flash Memory is in the program mode.
program
pin 43;
“******************* PAD A Outputs and other internal node declaration *******************
“The following are chip selects for EPROM, SRAM and I/O Port
rs0,csiop,es0,es1,es2,es3,es4,es5,es6,es7 node;
“The following are Page Register outputs (for PSD3X2, PSD3X3 only).
“pgr3, pgr2, pgr1, pgr0 node;
“*****************************************************************************************************
Appendix A
(cont.)
相關(guān)PDF資料
PDF描述
PSD302R Field Programmable Microcontroller Peripherals(可編程邏輯,無(wú)SRAM,19個(gè)可編程I/O,通用PLD有16個(gè)輸入)
PSD303L Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個(gè)可編程I/O,通用PLD有16個(gè)輸入)
PSD303 Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個(gè)可編程I/O,通用PLD有16個(gè)輸入)
PSD311L Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個(gè)可編程I/O,通用PLD有12個(gè)輸入)
PSD311 Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個(gè)可編程I/O,通用PLD有12個(gè)輸入)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PSD301L-15J 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
PSD301L-15JI 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
PSD301L-15LI 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
PSD301L-15LM 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
PSD301L-15U 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
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