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參數(shù)資料
| 型號： | PS22054 |
| 元件分類： | 運(yùn)動控制電子 |
| 英文描述： | AC MOTOR CONTROLLER, 30 A, DMA28 |
| 封裝： | DIP-28 |
| 文件頁數(shù)： | 2/9頁 |
| 文件大?。?/td> | 124K |
| 代理商： | PS22054 |
MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
PS22054
TRANSFER-MOLD TYPE
INSULATED TYPE
May 2005
Fig. 2 INTERNAL FUNCTIONS BLOCK DIAGRAM (TYPICAL APPLICATION EXAMPLE)
Z : ZNR (Surge absorber)
C : AC filter (Ceramic capacitor 2.2~6.5nF)
(Protection against common-mode noise)
Note1:
To prevent input signals oscillation, an RC coupling at each input terminal is recommended.
2:
By virtue of integrating HVIC inside the module, direct coupling to MCU terminals without any opto-coupler or transformer isolation is possible.
3:
Fo output is open drain type. The signal line should be pulled up to the positive side of a 5V supply with an approximate 10k
resistor.
4:
The wiring between the power DC-link capacitor and the P/N1 terminals should be as short as possible to protect DIP-IPM against catastrophic high
surge voltage. For extra precaution, a small film type snubber capacitor (0.1~0.22
F, high voltage type) is recommended to mount closely to the
P and N1 terminals.
5:
Fo output pulse width (tFO) should be determined by connecting external capacitor between CFO and VNC terminals. (Example : tFO=2.4ms(typ.)
at CFO=22nF)
6:
High voltage (1200V or more) and fast recovery type (less than 100ns) diodes should be used for the bootstrap circuit.
7:
It is recommended to insert a Zener diode (24V/1W) between each pair of control supply terminals to prevent surge destruction.
8:
To prevent LVIC from surge destruction, it is recommended to mount a fast recovery type diode between VNC and NU, NV, NW terminals.
CBU–
CBU+
CBV–
CBV+
CBW–
CBW+
FO
CFO
M
(Note 7)
DIP-IPM
C2
C1
(Note 4)
Z
(15V line)
VD
VNC
C
H-side IGBTS
L-side IGBTS
W
V
U
P
N1
NW
NV
NU
High-side input (PWM)
(5V line)
(Note 1,2)
(Note 6)
AC line output
Input signal
conditioning
Level shifter
Drive circuit
Protection
circuit (UV)
Input signal
conditioning
Input signal
conditioning
circuit (UV)
Protection
circuit (UV)
Drive circuit Drive circuit
Level shifter Level shifter
Protection
Drive circuit
Input signal conditioning
Fo logic
Protection
circuit
Control supply
Under-Voltage
protection (UV)
AC line input
Inrush current
limiter circuit
(5V line)
(Note 1, 2) Fault output (5V line)
(Note 3, 5)
Low-side input (PWM)
C1 : Tight tolerance, temp-compensated electrolytic type
C2 : 0.22~2
F R-category ceramic capacitor for noise filtering
(Note : The capacitance depends on the PWM control
scheme used in the applied system.)
(Note 8)
VNC
CIN
Fig. 3 EXTERNAL PART OF THE DIP-IPM PROTECTION CIRCUIT
Note1:
In the recommended external protection circuit, please select the RC time
constant in the range 1.5~2.0
s.
2:
To prevent erroneous protection operation, the wiring of A, B, C should be
as short as possible.
Drive circuit
Protection circuit
SC protection
trip level
IC (A)
tw (
s)
2
0
Short Circuit Protective Function (SC) :
SC protection is achieved by sensing the L-side DC-Bus current (through the external
shunt resistor) with a suitable filtering time (defined by the RC circuit).
When the sensed shunt voltage exceeds the SC trip-level, all the L-side IGBTs are turned
OFF and a fault signal (Fo) is output.
Since the SC fault may be repetitive, it is recommended to stop the system and check the fault,
when the Fo signal is received.
(Note 1)
(Note 2)
W
V
U
VNC
CIN
A
P
N1
C
R
Shunt
resistor
External protection circuit
DIP-IPM
L-side IGBTS
H-side IGBTS
NU
NV
NW
B
C
Collector current
waveform
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