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參數資料
| 型號： | PS12018-A |
| 元件分類： | 運動控制電子 |
| 英文描述： | AC MOTOR CONTROLLER, 50 A, DFM36 |
| 文件頁數： | 1/6頁 |
| 文件大?。?/td> | 539K |
| 代理商： | PS12018-A |
MITSUBISHI SEMICONDUCTOR <Application Specific Intelligent Power Module>
PS12018-A
FLAT-BASE TYPE
INSULATED TYPE
Jan. 2000
PRELIMINARY
Notice:
This
is not
a final
specification.
Some
parametric
limits
are subject
to change.
LABEL
115
± 1
96
1
5
13
8.5
55
10
50
32
15.5
2.5
105
± 0.5
63.5
± 0.8
17.5
(102)
(22)
0.5
3
V 3
12.7
± 0.3
76
±1
41
±0.5
2
± 0.3
56
± 0.8
20.4
± 1
17
± 0.8
60
±0.5
63
±0.8
1
±0.3
15.5
6
± 0.3
4-φ
5
4-R2
4-R5
4-
φ4.5
4-
φ3.2
MOUNTING
HOLE
1
7
23
31
36
1 CBU+
2 CBU–
3 CBV+
4 CBV–
5 CBW+
6 CBW–
7 GND
8 VDL
9 VDH
10 CL
11 FO1
12 FO2
13 FO3
14 CU
15 CV
16 CW
17 UP
18 VP
19 WP
20 UN
21 VN
22 WN
23 Br
31 P
32 B
33 N
34 U
35 V
36 W
Terminals Assignment:
PS12018-A
PACKAGE OUTLINES
MITSUBISHI SEMICONDUCTOR <Application Specific Intelligent Power Module>
PS12018-A
FLAT-BASE TYPE
INSULATED TYPE
(Fig. 1)
INTEGRATED FUNCTIONS AND FEATURES
3-Phase IGBT inverter bridge configured by the latest 3rd.
generation IGBT and diode technologies.
Circuit for dynamic braking of motor regenerative energy.
Inverter output current capability Io (Note 1) :
APPLICATION
Acoustic noise-less 3.7kW/AC400V Class 3 Phase inverter and other motor control applica-
tions.
INTEGRATED DRIVE, PROTECTION AND SYSTEM CONTROL FUNCTIONS:
For P-Side IGBTs : Drive circuit, High-speed photo-couplers, Short circuit protection (SC),
Bootstrap circuit supply scheme (Single drive power supply ) and Under-voltage protection (UV).
For N-Side IGBTs : Drive circuit, Short-circuit protection (SC), Control supply Under voltage and Over voltage protection (OV/UV),
System Over temperature protection (OT), Fault output signaling circuit (Fo), and Current-Limit warning signal out-
put (CL).
For Brake circuit IGBT : Drive circuit.
Warning and Fault signaling :
FO1 : Short circuit protection for lower-leg IGBTs and Input interlocking against spurious arm shoot-through.
FO2 : N-side control supply abnormality locking (OV/UV)
FO3 : System over-temperature protection (OT).
CL : Warning for inverter current overload condition
For system feedback control : Analogue signal feedback reproducing actual inverter output phase current (3
φ).
Input Interface : 5V CMOS/TTL compatible, Schmitt trigger input, and Arm-Shoot-Through interlock protection.
Type Name
PS12018-A
100% load
9.2A (rms)
150% over load
13.8A (rms), 1min
(Note 1) : The inverter output current is assumed to be sinu-
soidal and the peak current value of each of the
above loading cases is defined as : Iop = Io !
√2
PRELIMINARY
Notice:
This
is not
a final
specification.
Some
parametric
limits
are subject
to change.
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