參數(shù)資料
型號： PRODUCT
英文描述： Product Selection Guide 2002
中文描述： 產(chǎn)品選型指南2002
文件頁數(shù)： 17/26頁
文件大?。?/td> 1061K
代理商： PRODUCT
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LSI LO G IC PRO DUC T SELEC TIO N G UIDE
14
MDC
MDIO
TXA
RXA
Lane A
Lane B
Lane C
Management Interface
TopLevel Contros
RFC
RFC
REF CLK
JTAGSignals
MODE [3:0]
RCA
RDA [9:0]
TCA
TDA [9:0]
Smoothing
FIFO
Character
Substitution
Character
Substitution
Elastic
FIFO
Lane
Align
8B/10B
Encoder
8B/10B
Decoder
GgaBaze
Transmtter
(serializer)
GgaBaze
Receiver
(de-serializer)
JTAG
BIST
Lane D
R
R
Four principal modes of operation
- 10 Gigabit Ethernet (XGXS)
- 10 Gigabit Fibre Channel (XGXS)
- SerDes - Four separate transceivers
(1X) or synchronously timed (4X)
- Enhanced SerDes Mode (1X and 4X
with 8B/ 10B)
Four independent serializers/
deserializers (SerDes)
Low noise: Terminations integrated
into SerDes cores
Flexible Serial data rates: 3.1875 to
1.0625 Gbps
XGMII Interface - HSTL Parallel I/O pads
Management Interface
- MDC/MDIO (IEEE 802.3ae, Clause 45)
Extensive Register Set
Equalization: Emphasis
Redundant I/ O
- Configurable as two channels with
redundant transmitters and selectable
receivers
Direct connection to Xenpak and other
Optical Modules (non-W DM) through
Signal Detection Pin
- Hot pluggable Serial I/ O
- RxLos Signal
Test Mode Support
- Built-in Self Test (BIST)
- Internal serial and parallel loopbacks
- JTAG Boundary Scan Support for
HSTL_1 I/ O
- PRBS
Low power consumption
- <2 W typical @ 3.125 Gbps (<500
mW per channel)
Two Power Supplies
- 1.8v Core Logic
- 1.5v HSTL Interface
289 Ball PBGA (19 x 19mm)
L80711 and L84701
QuadMulti-Ggabt Serial Transceiver
L80711 and L84701 Block Diagram
Compliant to or Supporting the
following Standards:
- XGXS (3.125 Gb/ sec) per IEEE
802.3ae Draft 4.x
- Gigabit Ethernet (1.25 Gb/ s data
rate)
- 10 Gigabit Fibre Channel (3.1875
Gbps)
- Fibre Channel Data Rates as a
SerDes (1.0625 & 2.125 Gbps)
- InfiniBand as SerDes (2.5 Gb/ s
data rate)
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