參數(shù)資料
型號: PPC440GX-3CF667CZ
廠商: APPLIEDMICRO INC
元件分類: 微控制器/微處理器
英文描述: Power PC 440GX Embedded Processor
中文描述: 32-BIT, 667 MHz, RISC PROCESSOR, CBGA552
封裝: 25 X 25 MM, CERAMIC, FBGA-552
文件頁數(shù): 77/93頁
文件大小: 794K
代理商: PPC440GX-3CF667CZ
440GX – Power PC 440GX Embedded Processor
AMCC
77
Revision 1.15 – August 30, 2007
Data Sheet
I/O Specifications—500MHz–800MHz
Notes:
1. PerClk rising edge at package pin with a 10pF load trails the internal PLB clock by approximately 1.3ns.
Signal
Input (ns)
Output (ns)
Output Current (mA)
Clock
Notes
Setup
Time
(T
IS
min)
Hold Time
(T
IH
min)
Valid Delay
(T
OV
max)
Hold Time
(T
OH
min)
I/O H
(minimum)
I/O L
(minimum)
External Slave Peripheral Interface
PerData00:31
2.8
1
6.6
0
15.3
10.2
PerClk
PerAddr00:31
2.9
1
6.6
0
15.3
10.2
PerClk
PerPar0:3
2.7
1
6.0
0
15.3
10.2
PerClk
PerWBE0:3
1.8
1
5.1
0
15.3
10.2
PerClk
PerCS0:7
na
na
5.8
0
15.3
10.2
PerClk
PerOE
na
na
5.5
0
15.3
10.2
PerClk
PerWE
na
na
5.5
0
15.3
10.2
PerBLast
3.3
1
5.7
na
15.3
10.2
PerClk
PerReady[RcvrInh]
4.9
1
na
na
na
na
PerClk
PerR/W
2.5
1
5.7
na
15.3
10.2
PerClk
DMAReq0:3
dc
dc
na
na
na
na
PerClk
DMAAck0:3
na
na
6.0
0
5.1
6.8
PerClk
EOT0:3/TC0:3
dc
dc
6.3
0
15.3
10.2
PerClk
External Master Peripheral Interface
PerClk
na
na
na
na
15.3
10.2
PLB Clk
1
ExtReset
na
na
6.7
0
15.3
10.2
PerClk
HoldReq
2.8
1
na
na
na
na
PerClk
HoldAck
na
na
5.5
0
15.3
10.2
PerClk
ExtReq
1.5
1
na
na
na
na
PerClk
ExtAck
na
na
5.7
0
15.3
10.2
PerClk
BusReq
na
na
5.7
0
15.3
10.2
PerClk
PerErr
2.5
1
na
na
15.3
10.2
PerClk
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