參數(shù)資料
型號(hào): PPC440GP-3CC333C
廠商: APPLIEDMICRO INC
元件分類: 微控制器/微處理器
英文描述: Power PC 440GP Embedded Processor
中文描述: 32-BIT, 333 MHz, RISC PROCESSOR, CBGA552
封裝: 25 X 25 MM, CERAMIC, BGA-552
文件頁(yè)數(shù): 73/83頁(yè)
文件大小: 773K
代理商: PPC440GP-3CC333C
440GP – Power PC 440GP Embedded Processor
AMCC
73
Revision 1.07 – October 4, 2007
Data Sheet
I/O Timing—DDR SDRAM T
DS
Notes:
1. All of the DQS signals are referenced to MemClkOut0(0).
2. The T
DS
values in the table include 3/4 of a cycle at the indicated clock speed.
3. To obtain adjusted values for lower clock frequencies, subtract 5.625 ns from the values in the table and add 3/4 of the cycle
time for the lower clock frequency (T
DS
- 5.625 + 0.75T
CYC
).
Clock Speed (MHz)
Signal Name
T
DS
(ns)
Minimum
Maximum
133
DQS0
na
6.25
133
DQS1
na
6.25
133
DQS2
na
6.25
133
DQS3
na
6.25
133
DQS4
na
6.25
133
DQS5
na
6.25
133
DQS6
na
6.25
133
DQS7
na
6.25
133
DQS8
na
6.25
I/O Timing—DDR SDRAM T
SK
, T
SA
, and T
HA
Notes:
1. T
SK
is referenced to MemClkOut0(0). T
SA
and T
HA
are referenced to MemClkOut0(90).
2. To obtain adjusted T
SA
values for lower clock frequencies, use 3/4 of the cycle time for the lower clock frequency and
subtract T
SK
maximum (0.75T
CYC
- T
SK
max).
3. To obtain adjusted T
HA
values for lower clock frequencies, use 1/4 of the cycle time for the lower clock frequency and add
T
SK
minimum (0.25T
CYC
+ T
SK
min).
Clock Speed (MHz)
Signal Name
T
SK
(ns)
T
SA
(ns)
T
HA
(ns)
Minimum
Maximum
Minimum
Minimum
133
MemAddr00:12
0.4
1.2
4.425
2.275
133
BA0:1
0.4
1.2
4.425
2.275
133
BankSel0:3
0.4
1.2
4.425
2.275
133
ClkEn0:3
0.4
1.2
4.425
2.275
133
CAS
0.4
1.2
4.425
2.275
133
RAS
0.4
1.2
4.425
2.275
133
WE
0.4
1.2
4.425
2.275
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